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???
12/30/03 02:38
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#61544 - RE: RTC Assembly and C
Responding to: ???'s previous message
CODE SPACE MEMORY OVERLAP means that you try to fit too big chunk of code in too small space or try to create two chunks of code in the same space.

Say, you're using two interrupts, one triggered by INT0 output going low, and other by Timer1 overflowing. So, according to the manual of your chip, you order the compiler to put the INT0 service code starting from byte 03h and the clock routine at 0Bh (11 dec) - maybe by C code keyword "interrupt", maybe by ASM code directive ORG...
Anyway, your external interrupt routine is not very simple takes 9 bytes of code. So, starting at byte 3 plus 9 bytes, this gives the last instruction at byte 12 (0Ch). But starting at 0Bh there's the clock routine supposed to be. So where the address of PSW for final POP PSW (you always push and pop PSW in an interrupt, don't you? ;) and RETI of the INT0 is supposed to be, the clock thing requests POP command and PSW argument respectively... The compiler can't comply.

Solution: Jump.
ORG 03h
JMP MY_INT0
ORG 0Bh
AJMP CLOCK
and start them where there's enough room for them.

Hope you understand the problem and will be able to solve it now...

List of 7 messages in thread
TopicAuthorDate
RTC Assembly and C            01/01/70 00:00      
   RE: RTC Assembly and C            01/01/70 00:00      
   RE: RTC Assembly and C            01/01/70 00:00      
      RE: RTC Assembly and C            01/01/70 00:00      
   RE: RTC Assembly and C            01/01/70 00:00      
      RE: RTC Assembly and C            01/01/70 00:00      
      asm relapse!!            01/01/70 00:00      

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