Fine then....maybe you have it Just like you want it. 4/5 cycles is probably close as you can get to zero. If that seems too slow to you then move up to a 1X bus cycle type part. On a 50 MHz Signal Labs C8051F126 the following....

    11:     num = num -1; 
    12:  
C:0x0005    E509     MOV      A,0x09
C:0x0007    1509     DEC      0x09
C:0x0009    7002     JNZ      C:000D
C:0x000B    1508     DEC      num(0x08)
    13:         num = q * 32; 
C:0x000D    ????     ...

...translates into a total of 7/8 cycles or 140/160 nanoseconds.

By the way,,,,,,the reason INC and DEC do not muck with the Carry flag is so that they can be used in loops where shifting is going on and CY holds results from one shift cycle to the next. This is common in multi byte shifts & rotates and in software math routines.

On a Mot 'GP32 which is an 8-bit HC08 architecture where you have more conventional flag handling than on a '51 it takes code like...

     INC  LOW    (4)
     BNE  L1     (3)
     INC  HIGH   (4)
L1:
        --------------
                (11) Cycles

Or....

     LDHX HIGH_LOW (4)
     AIX  #1       (2)
     STHX HIGH_LOW (4)
        --------------
                  (10) Cycles

... Where the highest speed is 125 nanoseconds per cycle.

Michael Karas