??? 06/21/04 08:02 Read: times |
#72840 - RE: reset with SP Responding to: ???'s previous message |
It's not sure that the "lost" program will come at all to 1FF0H, so that solution is not reliable.
You can easily make an external WDT, using 74HC123, which is a double retriggerable monoflop. It means that once activated by a pulse, it will remain activated if the next pulse appears during its active period - defined by external R-C components. /Q out of HC123 is connected to reset of processor. In your software you should activate one port-bit (CLR bit, SETB bit) periodically. That pin is connected to input B of HC132. Thus, as long as the processor sends pulses regularly, HC123's output /Q will be low. If the pulses stop coming, /Q will go high and give a reset. The Normal start-reset logic should activate the HC123 by it's negative edge (input A of HC123), it will be the first pulse to free the reset. A capacitor (1nF) to GND and a resistor to +5V is recommended on CLR input of HC123. |
Topic | Author | Date |
reset with SP | 01/01/70 00:00 | |
RE: reset with SP | 01/01/70 00:00 | |
RE: reset with SP | 01/01/70 00:00 | |
RE: reset with SP | 01/01/70 00:00 | |
RE: reset with SP | 01/01/70 00:00 | |
RE: reset with SP![]() | 01/01/70 00:00 |