Peter,
What you propose works fine if the concern is other interrupts, I would, however be weary of it since the situation below still can happen.
However, in the case of lenghty processing of received bytes: if a received byte take more than byte time to reach the ret after do_reti the process will fail sice the next byte will cause the ISR to be entered while the current is processing between do_reti and ret which will be entered again for the second byte while the first is not finished.

Erik