Googling for reg517 gave me http://www.keil.com/dd/docs/c51/infineon/reg517.h, so at least we now know the processor... But fully agree with Kai - you need our help so you must give us the maximum possible information, otherwise we lose interest to help you.

OK, so if this is an interrupt service routine (isr), you must store all registers that are used both in main program and the interrupt. Here, you need to store at least the accumulator, so you need a push acc at the beginning of isr and pop acc at the end of it. It is always a good idea to store also the psw, although not necessary here, as no flags are modified (but I doubt you have considered this).
Please, read the tutorial on this site, concentrate on the interrupts section - a lot of good hints for beginners is there.

First, it might be a good idea to stop the counter prior you change it.
Then, setting tl0 while running to -2 means, that the counter rolls over before it hits the next instruction. So you end up with setting th0:tl0 to 0ff00h, which is maybe not what you intended.
And, if you would stop the counter and set th0:tl0 to 0fffeh, it would roll over the next instruction after you reenable it (before reti), hence you will have int0 active all the time, allowing for only 1 instruction from the main program to be executed between consecutive timer0 interrupts, which is probably not what you wanted.

you can do a little optimisation if you wish :-) you can use mov r0,#30h-1 ...

So here you want to end up with a number of pressed key in r2. However, if this works OK, this will give you a result between 30h and 3Ch - are you sure you wanted this?
You are processing it furher here:

which is certainly wrong, as you pick from the table values offset 30h,31h,32h,33h for DO, 31h,32h,33h,34h for DO#, 32h,33h,34h,35h for RE etc.

These are only the obvious errors, I did not check, if this would really work on the given processor (and you hardware, which you did not describe at all).

Jan Waclawek