Hello everyone,

I am new to this forum.
I am doing a project on printing some real time image frames on an 128*64 graphic LCD module.
In our project we are trying to see real time image frames on a 128*64 bit graphic LCD module. We have interfaced the module with an atmel at89c51 microcontroller. There is an FPGA that is sending data bytes to the microcontroller. We are collecting data from one port of the microcontroller and sending it to the lcd module through another port. The rest two ports are used as control ports for the LCD module and the FPGA. Through these control ports handshaking is done.

We have tested one code that is available in one website
www.lcdmodkit.com . THis code can print some display atterns(like
alternate row or columns or some ccheckerboard pattern). It also
includes printing of a offline image (the bytes are stored in memory).
But we are felling when we have to fetch print the real-time
images as written before. We are also facing some problems. Like when we are resetting the microcontroller all the signals sometimes gets low instead of being set to its initial position. Sometimes when the signals are reset to their proper logic level, the module sometimes get stucked to that point. Also sometimes the some patched pattern is coming in the screen.
Can anybody give us any idea or logic to print real time image frames in the graphic LCD module? IF any body can help anyway it will be very heplfull for us.

regards,

Anirban Das
IIT Kharagpur
INDIA
p.s. I am attaching the logic for convenience
______________________
f;*****************************************************
; *
;PROGRAM FOR FINAL INTERFACING BETWEEN MPU AND FPGA *
; *
; *
;******************************************************
;
;***************************************
;* MCU <-> LCD pin connection *
;* *
;* P1.0 - 1.7 <-> DB0 -DB7 *
;* P0.0 - 0.7 <-> IN0- IN7 *
;***************************************

ORG 0H

CSA REG P3.4 ; PIN REGISTRATION
CSB REG P3.5
RS REG P3.3
RW REG P3.1
E REG P3.0
RST REG P3.6
EL1 REG P3.7

ACK REG P2.0 ;ACKNOWLEDGE THAT INFORMATION OF A NEW BYTE HAS BEEN RECEIVED
DTWR REG P2.1 ;DATA HAS BEEN WRITTEN TO THE LOCATION OF RAM
CLACK REG P2.2 ;OUTPUT THAT CLM HAS BEEN RECEIVED
CLM REG P2.3 ;INPUT SIGNAL FOR STARTING OF EACH COLUMN
NDAT REG P2.4 ;HAND-SHAKING SIGNALS BETWEEN MICROPROCESSOR AND FPGA
NTFY REG P2.5 ;NOTIFY THAT THE SYSTEM HAS REACHED TO POINT OFINTERFACING


COM EQU 20H
DAT EQU 21H

START: ; MAIN PROGRAM
MOV P0,#00H ; CLEAR PORT 1 TO 3
MOV P1,#00H
MOV P2,#00H
MOV P3,#00H
NOP
NOP

CLR RST
NOP
NOP
NOP
SETB RST ; SET THE RST PIN TO HIGH

;SETB RST ; SET THE RST PIN TO HIGH

CLR NDAT ; RESET THE HANDSHAKING INPUT AND OUTPUT SIGNALS
CLR ACK ; HTIS PART IS UNNECESSARY AS THE PORTS HAS BEEN ALREADY CLEARED
CLR CLM
CLR CLACK
CLR DTWR

CLR EL1 ; TURN ON THE EL BACKLIGHT

CALL TURN_OFF ; TURN DISPLAY OFF
CALL DELAY
CALL DELAY

CALL TURN_ON ; TURN DISPLAY ON
CALL DELAY
CALL DELAY


SETB NTFY
CALL FULL_OFF ; ALL PIXEL OFF
CALL DELAY
CALL DELAY
CLR NTFY

SETB NTFY
CALL FULL_ON ; ALL PIXEL ON
CALL DELAY
CALL DELAY
CLR NTFY

SETB NTFY
CALL ROW4L ; ALTERNATE 4ROW ON
CALL DELAY
CALL DELAY
CALL DELAY
CALL DELAY
CLR NTFY

GRAPH:
SETB NTFY ; NOTIFICATION HERE
CALL GRAPH_L ; DISPLAY AN IMAGE
CALL GRAPH_R
JMP GRAPH






TURN_ON:
MOV COM,#0C0H ; DISPLAY START LINE = 0
LCALL INST_L
LCALL INST_R
MOV COM,#03FH ; DISPLAY ON
LCALL INST_L
LCALL INST_R
RET

TURN_OFF:
MOV COM,#0C0H ; DISPLAY START LINE = 0
LCALL INST_L
LCALL INST_R
MOV COM,#03EH ; DISPLAY OFF
LCALL INST_L
LCALL INST_R
RET


FULL_OFF: ; ( PROCEDURE FOR ALL PIXEL OFF )
MOV R4,#00H
FULL_OFF1:
MOV A,R4
ORL A,#0B8H ; SET PAGE ADDRESS TO PAGE 0
MOV COM,A
LCALL INST_L
LCALL INST_R
MOV COM,#40H ; SET Y ADDRESS TO 1
LCALL INST_L
LCALL INST_R
MOV R3,#40H ; SET Y ADDRESS LOOP COUNTER = 64
FULL_OFF2:
MOV DAT,#00H ; PUT 00000000 TO THE DATA BYTE
LCALL DATA_L
LCALL DATA_R
DJNZ R3,FULL_OFF2
INC R4 ; PAGE ADDRESS LOOP COUNTER (0-7)
CJNE R4,#08H,FULL_OFF1 ; COMPARE JUMP IF NOT EQUAL
RET

FULL_ON: ; ( PROCEDURE FOR ALL PIXEL OFF )
MOV R4,#00H
FULL_ON1:
MOV A,R4
ORL A,#0B8H ; SET PAGE ADDRESS TO PAGE 0
MOV COM,A
LCALL INST_L
LCALL INST_R
MOV COM,#040H ; SET Y ADDRESS TO 1
LCALL INST_L
LCALL INST_R
MOV R3,#040H ; SET Y ADDRESS LOOP COUNTER = 64
FULL_ON2:
MOV DAT,#0FFH ; PUT 11111111 TO THE DATA BYTE
LCALL DATA_L
LCALL DATA_R
DJNZ R3,FULL_ON2
INC R4 ; PAGE ADDRESS LOOP COUNTER (0-7)
CJNE R4,#08H,FULL_ON1 ; COMPARE JUMP IF NOT EQUAL
RET










ROW4L:
MOV R3,#00H ;Y=0
LOOPOUT4L:
MOV R4,#07H ;X(PAGE ADDRESS)=7
LOOPIN4L:
MOV A,R4 ;SET PAGE ADDRESS TO R4
ORL A,#0B8H
MOV COM,A
LCALL INST_L

MOV A,R3 ;SET Y ADDRESS TO R3
ORL A,#040H
MOV COM,A
LCALL INST_L

MOV DAT,#0F0H
LCALL DATA_L

DEC R4
CJNE R4,#0FFH,LOOPIN4L
INC R3
CJNE R3,#040H,LOOPOUT4L




ROW4R:
MOV R3,#00H ;Y=0
LOOPOUT4R:
MOV R4,#07H ;X(PAGE ADDRESS)=7
LOOPIN4R:
MOV A,R4 ;SET PAGE ADDRESS TO R4
ORL A,#0B8H
MOV COM,A

LCALL INST_R
MOV A,R3 ;SET Y ADDRESS TO R3
ORL A,#040H
MOV COM,A

LCALL INST_R
MOV DAT,#0F0H

LCALL DATA_R
DEC R4
CJNE R4,#0FFH,LOOPIN4R
INC R3
CJNE R3,#040H,LOOPOUT4R
RET



GRAPH_L: ; ( PORCEDURE FOR LEFT SCREEN IMAGE )
MOV R3,#00H ;Y=0
LOOPOUTL:
LCALL COLUMN_START ;SUBROUTINE FOR FINDING THE SIGNAL TO STRART A COLUMN
CLR CLACK ;CLM ACKNOWLEDGEMENT IS CLEARED
MOV R4,#07H ;X(PAGE ADDRESS)=7
LOOPINL:
LCALL NEW_DATA ;SUBROUTINE FOR COLLECTING DATA FROM FPGA
CLR DTWR ;CLEAR THE DATA WRITNG SIGNAL

MOV A,R4 ;SET PAGE ADDRESS TO R4
ORL A,#0B8H
MOV COM,A
LCALL INST_L
MOV A,R3 ;SET Y ADDRESS TO R3
ORL A,#040H
MOV COM,A
LCALL INST_L
CLR ACK ;CLEAR THE ACKNOWLEDGE SIGNAL AFTER APPROX. 70 CLOCK CYCLES ///////////

LCALL DATA_L ;SUBOUTINE FOR WRITING DATA TO THE DISPLAY RAM LOCATION ///////////
SETB DTWR ;SET THE DATA WRITEN SIGNAL TO NOTIFY THAT THE DATA HAS BEEN SUCCESFULLY WRITTEN//////

DEC R4
CJNE R4,#0FFH,LOOPINL
INC R3
CJNE R3,#03FH,LOOPOUTL
RET

GRAPH_R:
MOV R3,#00H ;Y=0
LOOPOUTR:
LCALL COLUMN_START ;SUBROUTINE FOR FINDING THE SIGNAL TO STRART A COLUMN
CLR CLACK ;CLM ACKNOWLEDGEMENT IS CLEARED
MOV R4,#07H ;X(PAGE ADDRESS)=7
LOOPINR:
LCALL NEW_DATA ;SUBROUTINE FOR COLLECTING DATA FROM FPGA
CLR DTWR ;CLEAR THE DATA WRITNG SIGNAL

MOV A,R4 ;SET PAGE ADDRESS TO R4
ORL A,#0B8H
MOV COM,A
LCALL INST_R
MOV A,R3 ;SET Y ADDRESS TO R3
ORL A,#040H
MOV COM,A
LCALL INST_R
CLR ACK ;ACKNOWLEDGE SIGNAL CLEARED AFTER APPROX. 70 CLOCK CYCLES/////////

LCALL DATA_R ;SUBOUTINE FOR WRITING DISPLAY DATA TO THE RAM LOCATION ///////
SETB DTWR ;SET THE DATA WRITEN SIGNAL TO NOTIFY THAT THE DATA HAS BEEN SUCCESFULLY WRITTEN//////

DEC R4
CJNE R4,#0FFH,LOOPINR
INC R3
CJNE R3,#03FH,LOOPOUTR
RET


INST_L: CLR CSB ; ( PROCEDURE FOR LEFT SCREEN INSTRUCTION WRITE )
SETB CSA
CLR RS
SETB RW
INST_L1:
MOV P1,#0FFH
NOP
SETB E
NOP
MOV A,P1
NOP
CLR E
NOP
JB ACC.7,INST_L1 ; CHECK BUSY
CLR RW
MOV P1,COM
NOP
SETB E
NOP
CLR E
NOP
RET

DATA_L: CLR CSB ; ( PROCEDURE FOR LEFT SCREEN DATA WRITE )
SETB CSA
CLR RS
SETB RW
DATA_L1:
MOV P1,#0FFH
NOP
SETB E
NOP
MOV A,P1
NOP
CLR E
NOP
JB ACC.7,DATA_L1 ; CHECK BUSY
SETB RS
CLR RW
MOV P1,DAT
NOP
SETB E
NOP
CLR E
NOP
RET

INST_R: SETB CSB ; (PROCEDURE FOR RIGHT SCREEN INSTRUCTION WRITE )
CLR CSA
CLR RS
SETB RW
INST_R1:
MOV P1,#0FFH
NOP
SETB E
NOP
MOV A,P1
NOP
CLR E
NOP
JB ACC.7,INST_R1 ; CHECK BUSY
CLR RW
MOV P1,COM
NOP
SETB E
NOP
CLR E
NOP
RET

DATA_R: SETB CSB ; ( PROCEDURE FOR RIGHT SCREEN DATA WRITE )
CLR CSA
CLR RS
SETB RW
DATA_R1:
MOV P1,#0FFH
NOP
SETB E
NOP
MOV A,P1
NOP
CLR E
NOP
JB ACC.7,DATA_R1 ; CHECK BUSY
SETB RS
NOP
CLR RW
MOV P1,DAT
NOP
SETB E
NOP
CLR E
NOP
RET

COLUMN_START:
JNB CLM,$ ;CHECK IF A NEW COLUMN IS COMING
NOP ;DEBOUNCE CHECKING
NOP
NOP
NOP
NOP
JNB CLM,COLUMN_START ;IF CLM IS LOW IT WAS A NOISE
NOP
SETB CLACK
RET

NEW_DATA:
JNB NDAT,$ ;CHECKING FOR A NEW DATA
NOP
NOP
NOP
NOP
NOP
JNB NDAT,NEW_DATA ;IF RESET,IT WAS A NOISE
MOV P0,#0FFH ;P0 IS THE PORT WHERE THE INCOMING BYTE ARIVES////////
NOP
MOV DAT,P0 ;P0 IS THE PORT FROM WHERE DATA IS COMING
NOP
SETB ACK ;ACKNOWLEDGE THAT DATA HAS BEEN RECEIVED
RET

DELAY: ; TIME DELAY ROUTINE
PUSH 6
PUSH 5
PUSH 4
MOV R6,#100
$2 MOV R5,#100
$1 MOV R4,#30
DJNZ R4,$
DJNZ R5,$1
DJNZ R6,$2
POP 4
POP 5
POP 6
RET

END