| ??? 02/09/05 20:09 Read: times Msg Score: +2 +1 Informative +1 Good Answer/Helpful |
#87032 - soft 8051 cores Responding to: ???'s previous message |
Jez Smith said:
Ive just been talking to yet another developer of softcore processors and as they say the problem of lack of jtag support,debug/emulation/trace is now being replaced with the question of how many signals can you bring out of the softcore and into the jtag logic analyser interface.I really dont belive that in 4 years time you will be able to get a new 8052 design other than as a softcore and you will have full visibility of any signal through jtag into your logic analyser. If I'm debugging firmware, the last thing I want to use is a logic analyzer. (I'm having flashbacks to those days.) A proper emulator/ICE with breakpointing, step capability, op-code disassembly, indication of register change, etc. are required. I'll use the logic analyzer (or, more likely, my ModelSim simulation) to debug the core. I need a higher-level approach when debugging the firmware running on the core. -a |
| Topic | Author | Date |
| 8051 Debug/Emulation on-Chip support | 01/01/70 00:00 | |
| some thoughts | 01/01/70 00:00 | |
| well | 01/01/70 00:00 | |
soft 8051 cores | 01/01/70 00:00 | |
| nice emulator | 01/01/70 00:00 | |
| emulator? | 01/01/70 00:00 |