Quoting the bottom right hand side of page 3-26 of the MCS 51 Microcontroller Family User's Manual: "The internal RAM is not affected by reset. On power up the RAM content is indeterminate."

It is true that the internal RAM is volatile; when your system powers up, it will be in an indeterminate state, as it is not initialized by the 8051's reset algorithm. Of course, resets may be generated at times other than power-up, as determined by your hardware. It is worth noting that most SFRs, in contrast with general purpose internal RAM are initialized by the reset algorithm, and will come up with known values after a reset (see page 2-9 for details on what these values are).

The fact that internal RAM remains unaffected by resets is actually rather useful, even though it might seem undesirable at first glance. For example, it allows you to return from powerdown mode with the bulk of the state from your previous session intact. In addition, SRAM (which is what the internal RAM in an 8051 is) is generally capable of retaining its contents at voltages significantly below its normal operating voltage; attempts to access an SRAM under low voltage conditions, however, are liable to lead to corruption. This observation, coupled SRAM's generally very low static power dissipation, a good supervisor IC, and a few other inexpensive components can allow you to build a variety of useful features into your project, including brownout recovery, permitting battery changes without data loss, and more.

--Sasha Jevtic