Using the dual modulus divider gives the following results:

Frequency Parameters:
-- Input Frequency: 32000000 Hz.
-- Desired Output Frequency: 12288000 Hz.
-- Requested Relative Frequency Error Bounds (+/-) : 1e-007 (0.1 ppm)

Achieved Output Frequency: 12288000 Hz.
-- Achieved Relative Frequency Error: 0 (0 ppm)
-- Achieved Frequency Error: 0 Hz.

Output Jitter Parameters (use_phase_accumulator = FALSE) :
-- The fundamental frequency is 256000 Hz.
-- The amplitude is 3.58723958333333e-007 seconds p-p (minimum_jitter = FALSE).
-- The amplitude is 3.05989583333332e-008 seconds p-p (minimum_jitter = TRUE).
Approx 11 flip flops (2 in prescaler, 7 in controller and 2 retimes).
-- The recursive controller uses approx 13 flip flops.
-- The Dual-Modulus Prescaler uses ratios /2,/3
-- The Output consists of 19 cycles of 2 input clocks,
-- and 29 cycles of 3 input clocks.
-- There are 48 output clocks for every 125 input clocks.

Approx Approx Relative Approx
-- ff Virtex Frequency Jitter Divider
-- count Slices Error (seconds) (generic parameters)
--
-- 26 tbd 8.7e-009 3.1e-008 use_phase_accumulator
-- 29 tbd 8.7e-009 1.6e-008 use_phase_accumulator improve_duty_cycle
-- 17 tbd 0 3.1e-008 use_recursive_controller
-- 18 tbd 0 3.1e-008 use_recursive_controller improve_duty_cycle
-- 11 tbd 0 3.1e-008 minimum_jitter
-- 12 tbd 0 3.1e-008 minimum_jitter improve_duty_cycle
-- 11 tbd 0 3.6e-007 (none)
-- 12 tbd 0 3.6e-007 (none) improve_duty_cycle