| ??? 06/29/05 19:31 Read: times |
#96229 - Same thought, almost same time Responding to: ???'s previous message |
Erik Malund said:
Which should'nt be a problem because the pullups have had one full instruction cycle to "pull up". Whereas in the Movx @dptr case they only have a few clocks. Thus the "strong output" is required at the "high address in same instruction" case but not in the "whatever is in p2" case. If you use some standard TTL gates for some address decoding you may get in trouble if the set p2 and movx @Ri are sequential, but with CMOS I can not see that happen. Exactly. You managed to write it a bit quicker than me though. :) Anyhow, using P0 and P2 as port I/O in an external memory environment is, at best, tricky san should be avoided. MMIO, however, is, of course, possible.
Erik I certainly was not advocating P2 for use as general purpose I/O in an external memory-equipped application. The complexity that would result probably exceeds that which would be introduced by the use of an I/O expander device. This thinking applies to to other multi-function pins on the 8051 as well. Select a use for them in the application at hand, and make that be the only one. That said 8-bit indirect addressing for external memory accesses is a perfectly legitimate technique. However, remembering to set port 2 beforehand seems to be a pretty common mistake. --Sasha Jevtic |
| Topic | Author | Date |
| function of 8051 pins | 01/01/70 00:00 | |
| double functions | 01/01/70 00:00 | |
| a requirement | 01/01/70 00:00 | |
| Yeah... and it's really big too! :) | 01/01/70 00:00 | |
| port0 | 01/01/70 00:00 | |
| thanks | 01/01/70 00:00 | |
| do not SHOUT | 01/01/70 00:00 | |
| A couple more little things | 01/01/70 00:00 | |
| PORT2 during MOVX @Ri | 01/01/70 00:00 | |
| which should'nt be a problem | 01/01/70 00:00 | |
| Same thought, almost same time | 01/01/70 00:00 | |
| Port 2 in memory access | 01/01/70 00:00 | |
| double function of SBUF | 01/01/70 00:00 | |
thank you jan waclawek | 01/01/70 00:00 |