??? 07/28/05 08:01 Read: times Msg Score: +1 +1 Informative |
#98323 - SDCC definition for OKI 80C154S |
Dear community,
this morning I compiled a register definition file for the Oki devices MSM80C154S and MSM83C154S for use with the marvellous free SDCC compiler. According to Google no such file has been published yet. /*------------------------------------------------------------------------- Register Declarations for the Oki MSM80C154S and MSM83C154S Written By - Matthias Arndt / marndt@asmsoftware.de (July 2005) This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. In other words, you are welcome to use, share and improve this program. You are forbidden to forbid anyone else to use, share and improve what you give them. Help stamp out software-hoarding! -------------------------------------------------------------------------*/ #ifndef REG8xC154S_H #define REG8xC154S_H #include <8052.h> /* load definitions for the 8052 core */ #ifdef REG8052_H #undef REG8052_H #endif /* byte SFRs */ sfr at 0xf8 IOCON; /* IOCON register */ /* bit locations */ sbit at 0xf8 ALF; /* floating status on power down control */ sbit at 0xf9 P1HZ; /* P1 high impedance input control */ sbit at 0xfa P2HZ; /* P2 high impedance input control */ sbit at 0xfb P3HZ; /* P3 high impedance input control */ sbit at 0xfc IZC; /* 10kO pull-up resistor control */ sbit at 0xfd SERR; /* Serial port reception flag */ sbit at 0xfe T32; /* interconnect T0 and T1 to 32bit timer/counter */ #endif Under Linux, install it under $BASEDIR/sdcc/include, basically where SDCC already stores its 8051.h and 8052.h include files. Same should apply for other SDCC installations. I agree that one hardly needs the IOCON register and all other registers are 8052 compatible anyway so this was mainly a toy for myself. Anyway I hope this helps and perhaps it is even useful for someone out there. cheers, Matthias |
Topic | Author | Date |
SDCC definition for OKI 80C154S | 01/01/70 00:00 | |
upload | 01/01/70 00:00 | |
Thanks | 01/01/70 00:00 | |
CVS![]() | 01/01/70 00:00 |