A digital intgrator is basicaly an adder plus an accumulator with a reset input, so this example one which ive used for earlier projects so it will do to demostrate the idea.it takes the sampled input adds an offset, then adds that result to the result in the accumulator.I havent written the code for the adder because that can be any type of adder we choose,same with the i/o its not memory mapped just plain old in/out.How fast it is depends mainly on how big we make the adders and if they are carry ripple or carry propagate and generate, but 20 Mhz would be very easy.

library IEEE;
use IEEE.STD_LOGIC_1164.all;

entity addacc is
   port (
    clock  : in  bit;
    rst    : in  bit; -- active high reset      
    acc    : in  bit_vector (10 downto 0); -- sample from adc
    result : out bit_vector (11 downto 0);
    offset : in  bit_vector (10 downto 0)
    );
end addacc;

architecture structural of addacc is
   component adder_10bit
      port (
      addend_10bit   : in  bit_vector (10 downto 0);
      augend_10bit   : in  bit_vector (10 downto 0);
      adder10_output : out bit_vector (11 downto 0)
      );
   end component;

signal result_adder01     : bit_vector (11 downto 0);
signal result_adder02     : bit_vector (11 downto 0);
signal result_adder02_reg : bit_vector (11 downto 0);

begin
adder01 : adder_10bit -- first adder to add adc sample and offset
  port map (
  addend_10bit     => offset,
  augend_10bit     => acc,
  adder10_output   => result_adder01
  );
adder02 : adder_10bit --second adder to add result from first adder to the result from accumulator
  port map (
  addend_10bit     => result_adder01,
  augend_10bit     => result_adder02_reg,
  adder10_output   => result_adder02
  );
  process (clock,rst)
  begin
          if  (rst='1') then
                result_adder02_reg <=(others=>'0');
          elsif ((clock = '1') and clock'event) then
                  result_adder02_reg <= result_adder02;
                  result <= result_adder02;
          end if;
  end process;
end structural;

The i/o could be made memory mapped if needed