| ??? 03/01/07 08:35 Modified: 03/01/07 09:00 Read: times |
#133998 - Maybe... Responding to: ???'s previous message |
Richard Erlacher said:
The CPLD doesn't have to be reprogrammed every power cycle ... It has non-volatile program memory. Once programmed, it stays that way... But then the same could be said of the microcontroller, couldn't it? - and there are plenty of applications for for In-System and In-Application (re-)programming of microcontrollers... Maybe he's after something like that? Just a thought... [update] Just re-read the original post, and he does specifically say, So we don't need reprogramming by PC after power off. Maybe he's actually using a volatile FPGA, and is erroneously calling it a CPLD? Is there such a thing as a volatile CPLD? So, clarification required from Jecksons Ben... [update] |
| Topic | Author | Date |
| "Programming CPLD with AT89S52" | 01/01/70 00:00 | |
| Things of the sort can be done... | 01/01/70 00:00 | |
| Why do you need to do that? | 01/01/70 00:00 | |
| Maybe... | 01/01/70 00:00 | |
| absolutely! But I'm still curious ... | 01/01/70 00:00 | |
| Why not? | 01/01/70 00:00 | |
| Altera used to have some code available | 01/01/70 00:00 | |
| jam vs. svf | 01/01/70 00:00 | |
| Programming CPLD with AT89S52 | 01/01/70 00:00 | |
| like I said.. | 01/01/70 00:00 | |
| Programming CPLD with MCS-51 | 01/01/70 00:00 | |
| forget JAM | 01/01/70 00:00 | |
| at 8Kbyte AT89S52 | 01/01/70 00:00 | |
| Understanding the problem | 01/01/70 00:00 | |
| it's relative | 01/01/70 00:00 | |
| Cypress CPLD=Xilinx CPLD | 01/01/70 00:00 | |
| You mean CY7C256? | 01/01/70 00:00 | |
| CY27256P160 | 01/01/70 00:00 | |
| Cypress doesn't know what that is | 01/01/70 00:00 | |
| sorry about the double-post | 01/01/70 00:00 | |
| Yes CY7C256 TQFP | 01/01/70 00:00 | |
Pin assigment at CPLD and AT89S52 | 01/01/70 00:00 |