| ??? 12/07/10 17:14 Modified: 12/07/10 17:14 Read: times |
#179961 - but isn't this the case with ALL microcontrollers? Responding to: ???'s previous message |
There are individual interrupt source disables in other microcontrollers, too - including the '51, of course - and they are also usually disabled after reset by default.
So what's the difference? I understand that any way it is safe after reset, just wonder why did ARM chose that unusal default state. JW |
| Topic | Author | Date |
| [ARM] Default state of interrupts | 01/01/70 00:00 | |
| Normally vectorized interrupt controller | 01/01/70 00:00 | |
| but isn't this the case with ALL microcontrollers? | 01/01/70 00:00 | |
| Often three layers of enable | 01/01/70 00:00 | |
| This is the case here (LPC17xx)... | 01/01/70 00:00 | |
| May vary a lot | 01/01/70 00:00 | |
| Not the case anymore for Cortex-M3s. | 01/01/70 00:00 | |
| Startup code? | 01/01/70 00:00 | |
| not startup code, but the after-reset state | 01/01/70 00:00 | |
| Hw-acceleration | 01/01/70 00:00 | |
| According to the datasheet of my CM3 ... | 01/01/70 00:00 | |
... but if we dig deeper to the datasheets... | 01/01/70 00:00 |