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03/16/01 15:11
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#10048 - RE: AT89C52 Circuit Design
I, personally, most often use memory mapped I/O to achieve the number of pins I need. I do, however, resort to IIC when I only need a few more pins than I have. The software is available in a million appnotes. Another advantage is the 2 pins will do however much you hang on. Re the IIC as opposed to shiftregisters in this application is that the IIC parts can generate an interrupt.
I do like your 4 pin (in / out / shift / latch) solution for the economy and in this case it may be the right way.
TGIF
Erik

List of 10 messages in thread
TopicAuthorDate
AT89C52 Circuit Design            01/01/70 00:00      
RE: AT89C52 Circuit Design            01/01/70 00:00      
RE: AT89C52 Circuit Design            01/01/70 00:00      
RE: AT89C52 Circuit Design            01/01/70 00:00      
RE: AT89C52 Circuit Design            01/01/70 00:00      
RE: Peter            01/01/70 00:00      
RE: Peter            01/01/70 00:00      
RE: AT89C52 Circuit Design            01/01/70 00:00      
RE: AT89C52 Circuit Design            01/01/70 00:00      
RE: AT89C52 Circuit Design            01/01/70 00:00      

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