??? 09/15/05 06:06 Read: times |
#101071 - you got it Responding to: ???'s previous message |
hi,
Mike Hymel said:
If some of P1 is input, values on those pins can possibly be read into accumulator as logical 0 during ISR. Logical 0 is then re-written back to port pin after and-or business via port register, activating strong internal pulldown and pin is no longer an input. If circuit that was driving this input pin changes to strong logical 1 micro sizzles. Yes, you are right. And how should we fix it? What is workaround? Regards, Oleg |
Topic | Author | Date |
Week puzzle IV | 01/01/70 00:00 | |
In my opinion | 01/01/70 00:00 | |
no | 01/01/70 00:00 | |
Bufff!! then TRB | 01/01/70 00:00 | |
Me and my shadow, walking down the aven | 01/01/70 00:00 | |
You & your shadow | 01/01/70 00:00 | |
http://www.coleporter.org/ | 01/01/70 00:00 | |
it's a hint | 01/01/70 00:00 | |
Well | 01/01/70 00:00 | |
you got it | 01/01/70 00:00 | |
Just OR with ones | 01/01/70 00:00 | |
how? | 01/01/70 00:00 | |
a simple solution: | 01/01/70 00:00 | |
not atomic | 01/01/70 00:00 | |
atomic not possible in general !![]() | 01/01/70 00:00 | |
My solution! | 01/01/70 00:00 | |
Wrong | 01/01/70 00:00 | |
not atomic | 01/01/70 00:00 | |
Ok, here is the shadow | 01/01/70 00:00 | |
only four bits | 01/01/70 00:00 | |
2 Hints! | 01/01/70 00:00 | |
Oh boy, do you need some bible time | 01/01/70 00:00 | |
re: 2 Hints! | 01/01/70 00:00 |