| ??? 10/15/05 10:16 Read: times |
#102448 - Asyncronous design Responding to: ???'s previous message |
Unfortunatly there just are not any suitable design/analysis tools available for someone wanting to design asyncronous digital systems,Thats really why its not a more popular sport, also fpga/cplds are not suitable platforms for asyncronous systems, but they do have lots of advantages over clocked systems.You can write asyncronous vhdl but simulators and place and route tools currently available get very confused by it. |
| Topic | Author | Date |
| clockless '51? | 01/01/70 00:00 | |
| Ring oscillator? | 01/01/70 00:00 | |
| Asyncronous design | 01/01/70 00:00 | |
| Its Prolly | 01/01/70 00:00 | |
| debugging | 01/01/70 00:00 | |
Advantages of async logic | 01/01/70 00:00 |