32.768kHz crystals are used, when extremely low power consumption is essential. Then, lowering the clock frequency also lowers the current consumption of associated CMOS circuitry (oscillator, flip-flops for frequency dividing, etc.). The only reason, why the crystal's frequency isn't made even lower than 32.768kHz is, that manufacturing of crystals showing lower frequencyies is difficult. So, for very low power consumption applications this 32.768kHz crystal is a good compromise.

On the other hand, crystals in the MHz-range are also very precise, sometimes even higher, but current consumption of associated electronics will be much higher, of course. That's the first disadvantage.
The second one is, that built-in oscillators of micros using this crsytal (which are Pierce oscillators, mostly) are not designed for producing ultra high precision, but for allowing of fast turn-on time and reliable turn-on preformance even at highly varying ambient temperatures, Vcc noise, manufacturing tolerances, etc. For this purpose very high Qs are disadvantageous. Remember, high Q means high precision of frequency and long settling times, when turning-on the oscillator. Low Q means, on the other hand, lower precision of frequency but faster settling times.
To be fair enough, the decrease of precision provided by the micro's oscillator isn't much more than some tens of ppm in the most cases and is probably covered by the manufacturing tolerances of the crystal. Nevertheless, for high precision Vcc noise must be rather little (means proper supply decoupling measures) and proper burden capacitors must be used!

Peter Dannegger has done some very nice work on this issue. Have a look at his website.

Kai