??? 10/26/05 17:48 Read: times |
#102980 - going out on a limb here but.. Responding to: ???'s previous message |
I remember the power electronics guys (ones who had to deal with switching of large currents wit FET devices) trying to explain to me the effects of "parisitic capacitance" on gate to drain of FET devices and using small value caps to compensate for effects. The parisitic capacitance would cause build up of charge on the gate to drain of FETS and cause trouble when trying to turn the devices to OFF state. This ends my meager knowlege on the subject.
Someone who works with these devices on a regular basis want to discuss or elaborate further? Andy |
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