i'm trying to make a controller for cable winding machine,the controller uses AT89S52 and a 24W04 serial eeprom
i've also fit in a 10 keys key board to input numbers, and five seven segments led, my controller is expected to do these things:
- upon startup if power to the motor driver (a stepper motor) is connected the controller read data from seeprom and begin operate,
it will drive the motor till the number of pulse from it's encoder (20 pulse per motor turn) equals data read from seeprom, then motor
stops waiting for a pulse from cable's drum sensor (one pulse per turn) upon detecting this pulse it read another two byte from seeprom and begin the cycle till all data from seeprom are read.
-upon startup if power not apply to motor driver it enters setup, it first read two byte from keypad and if save button pressed
save these byte in seeprom in consecutive order,every time user pushed next then save the sequence repeats. When power applied to motor driver the controller ends programming task and begin operation
my keypad and all other button worked, read and display encoder as well as compare routine worked fine except seeprom read and write routine do not work or read wrong .I've included the code listing written in assembly. Please help me to find out my mistakes
(I'm a foreigner so my English might not be clear or concise! hope you don't mind my English.) this is my first time using seeprom.
Thanks alot
Vu Nhu Khanh
I've include the file listing so you can help me
011 PAGE 1

1 ;wire_con.asm
2 $mod52
3 ;=======================================
4 ;i/o port pins
5 ;=======================================
6
00A0 7 pause bit p2.0 ;pause program excecution by sensing 5 volt
level
00A1 8 scl bit p2.1 ;scl clock pin of 24C04
00A2 9 sda bit p2.2 ;sda pin of 24C04
00A3 10 on1 bit p2.3 ;first digit from the left
00A4 11 on2 bit p2.4 ;second digit
00A5 12 on3 bit p2.5 ;third digit
00A6 13 on4 bit p2.6 ;fourth digit
00A7 14 on5 bit p2.7 ;fifth digit from the left
0087 15 back_set bit p0.7 ;chose next program step
00B0 16 next_set bit p3.0 ;if error go back one step program
00B1 17 save bit p3.1 ;if all is well save present step
00B2 18 drum_turn bit p3.2 ;count wire drum revolution
00B3 19 encoder bit p3.3 ;count encoder turns
00B4 20 mrun bit p3.4 ;control motor setb to run
00B5 21 mdir bit p3.5 ;control movements of motor setb to change d
irection
00B6 22 relay2 bit p3.6 ;relay2 control pin setb to close
00B7 23 relay1 bit p3.7 ;relay1 control pin setb to close
24
25 ;=================================
26 ;counting data registers
27 ;=================================
28 ;digit display masks
29
0082 30 zero equ 10000010b
00DE 31 mot equ 11011110b
00A8 32 hai equ 10101000b
00C8 33 ba equ 11001000b
00D4 34 bon equ 11010100b
00C1 35 nam equ 11000001b
0081 36 sau equ 10000001b
00DA 37 bay equ 11011010b
0080 38 tam equ 10000000b
00C0 39 chin equ 11000000b
00C1 40 char_s equ 11000001b
00A5 41 char_t equ 10100101b
00BD 42 char_r equ 10111101b
00B0 43 char_p equ 10110000b
008C 44 char_d equ 10001100b
45
0020 46 addlo equ 20h ;low order address pointer in rom_sub routin
e
0021 47 addhi equ 21h ;high order address pointer in rom_sub routi
ne
0022 48 tdata equ 22h ;scratch register in rom_sub routine
0023 49 rwdata equ 23h ;read and write data register in rom_sub rou
tine
0024 50 count equ 24h ;store counting data in rom_sub rout
ine
0025 51 dig1 equ 25h ;data storage for digit1
0026 52 dig2 equ 26h ;data storage for digit2
011 PAGE 2

0027 53 dig3 equ 27h ;data storage for digit3
0028 54 dig4 equ 28h ;data storage for digit4
0029 55 dig5 equ 29h ;data storage for digit5
002A 56 count1 equ 2ah ;stores data from key pad,or read fr
om eprom
002B 57 count2 equ 2bh ;stores data from key pad,or read fr
om eprom
002C 58 set1 equ 2ch ;stores data from encoder
002D 59 set2 equ 2dh ;stores data from encoder
002E 60 reprom equ 2eh ;stores low order address pointer fo
r sequensial read or write eeprom
002F 61 dsp_prog equ 2fh ;display working steps number of mac
hine
0030 62 rom_count equ 30h ;stores programming steps number dur
ing read or write
0031 63 index bit 31h ;bit set to indicate when one cycle
of operation complete
0032 64 drum_pulse bit 32h ;one pulse per drum revolution
0033 65 direction bit 33h ;set or clear to call motor directio
n subroutine
0080 66 led_out equ p0
0090 67 key_port equ p1
68
69 ;===============================================================
0000 70 org 0000h
0000 0202E7 71 ljmp begin
0003 72 org 0003h
0003 0200AE 73 ljmp count_up
000B 74 org 000bh ;timer 0 interrupt
000B 020081 75 ljmp update
0013 76 org 0013h
0013 0200DE 77 ljmp drum_count
0040 78 org 040h
79
80 ;=================================================================
81
0040 82 init_baud:
0040 758911 83 mov tmod,#00010001b ;timer 0 in 8 bit reload mode
0043 D2AF 84 setb ea ;global interrupt
0045 D2A9 85 setb et0 ;the timer 0 interrupt
0047 D28C 86 setb tr0
0049 D288 87 setb it0 ;negative edge trigger interrupt
004B D28A 88 setb it1
004D D2A8 89 setb ex0 ;the external interrupt for count_up

004F D2AA 90 setb ex1 ;the external interrupt for count_do
wn
0051 22 91 ret
92
93 ;============================================
94 ;this routine initialize all defined register during reset
95 ;to ensure correct operation
96 ;===========================================
97
0052 98 init_reg:
0052 74FF 99 mov a,#0ffh
0054 F580 100 mov p0,a
0056 F590 101 mov p1,a
011 PAGE 3

0058 F5A0 102 mov p2,a
005A F5B0 103 mov p3,a
005C 752000 104 mov addlo,#00h
005F 752100 105 mov addhi,#00h
0062 752200 106 mov tdata,#00h
0065 752300 107 mov rwdata,#00h
0068 7400 108 mov a,#00h
006A F524 109 mov count,a
006C F525 110 mov dig1,a
006E F526 111 mov dig2,a
0070 F527 112 mov dig3,a
0072 F528 113 mov dig4,a
0074 F529 114 mov dig5,a
0076 F52A 115 mov count1,a
0078 F52B 116 mov count2,a
007A F52C 117 mov set1,a
007C F52D 118 mov set2,a
007E F52E 119 mov reprom,a
0080 22 120 ret
121
122 ;====================================
123 ;the routine to update the display
124 ;====================================
0081 125 update:
0081 C0E0 126 push acc
0083 C0D0 127 push psw ;loop delay 1/1000 sec
0085 758CCE 128 mov th0,#-50
0088 758ACE 129 mov tl0,#-50
008B 852B25 130 mov dig1,count2
008E 12024F 131 lcall digit1
0091 852A26 132 mov dig2,count1
0094 120260 133 lcall digit2
0097 852F27 134 mov dig3,dsp_prog
009A 120271 135 lcall digit3
009D 852D28 136 mov dig4,set2
00A0 12027C 137 lcall digit4
00A3 852C29 138 mov dig5,set1
00A6 12028D 139 lcall digit5
00A9 D0D0 140 pop psw
00AB D0E0 141 pop acc
00AD 32 142 reti
143
144 ;=====================================
145 ;this routine to count stepper motor encoder
146 ;=====================================
00AE 147 count_up:
00AE C0E0 148 push acc
00B0 C0D0 149 push psw
00B2 C2A8 150 clr ex0
00B4 1202B5 151 lcall delayms
00B7 1202B5 152 lcall delayms
00BA 1202B5 153 lcall delayms
00BD E52C 154 mov a,set1
00BF 2401 155 add a,#01h
00C1 D4 156 da a
00C2 F52C 157 mov set1,a
00C4 B41010 158 cjne a,#10h,xong_isr
00C7 752C00 159 mov set1,#00h
011 PAGE 4

00CA E52D 160 mov a,set2
00CC 2401 161 add a,#01h
00CE D4 162 da a
00CF F52D 163 mov set2,a
00D1 B41003 164 cjne a,#10h,xong_isr
00D4 752D00 165 mov set2,#00h
00D7 166 xong_isr:
00D7 D2A8 167 setb ex0
00D9 D0D0 168 pop psw
00DB D0E0 169 pop acc
00DD 32 170 reti
171
172 ;=====================================
173 ;this routine to detect when drum made one turn
174 ;=====================================
00DE 175 drum_count:
00DE C0E0 176 push acc
00E0 C0D0 177 push psw
00E2 C2AA 178 clr ex1
00E4 1202B5 179 lcall delayms
00E7 1202B5 180 lcall delayms
00EA 1202B5 181 lcall delayms
00ED D232 182 setb drum_pulse
00EF C231 183 clr index
00F1 D2AA 184 setb ex1
00F3 D0D0 185 pop psw
00F5 D0E0 186 pop acc
00F7 32 187 reti
188
189 ;=======================================
190 ;these routine were put on separate files to avoid
191 ;long main program, doing this might cause problem due to program
192 ;synchronization
193 ;========================================
=1 194 $ic(4x4_key.inc) ;key read routine,based on Mc Kenzie's sample code
=1 195
=1 196
=1 197 ;the routine for 4x4 key pad use in mcs51 product
=1 198 ;==============================================================
=1 199 ; debounce keypress and key release
=1 200 ;==============================================================
=1 201
00F8 =1 202 in_hex:
00F8 C0D0 =1 203 push psw
00FA 7C14 =1 204 mov r4,#20 ; debounce count
00FC =1 205 back:
00FC 120114 =1 206 lcall get_key ; key pressed?
00FF 5010 =1 207 jnc done1 ; no - check again
0101 DBF9 =1 208 djnz r3,back ; yes - repeat 50 times
0103 852A2B =1 209 mov count2,count1
0106 F52A =1 210 mov count1,a
0108 =1 211 back2:
0108 7D14 =1 212 mov r5,#20 ; wait for key release
010A =1 213 back3:
010A 120114 =1 214 lcall get_key ; key still pressed?
010D 40F9 =1 215 jc back2 ; yes - keep checking
010F DDF9 =1 216 djnz r5,back3 ; no - repeat 50 times
0111 =1 217 done1:
011 PAGE 5

0111 D0D0 =1 218 pop psw
0113 22 =1 219 ret
=1 220
=1 221 ;=============================================================
=1 222 ; get keypad status - return with C = 0 if not key pressed
=1 223 ; return with C = 1, and hex code in acc. if pressed
=1 224 ; =============================================================
=1 225
0114 =1 226 get_key:
0114 74FE =1 227 mov a,#0feh
0116 7E04 =1 228 mov r6,#4
0118 =1 229 test:
0118 F590 =1 230 mov key_port,a
011A FF =1 231 mov r7,a
011B E590 =1 232 mov a,key_port
011D 54F0 =1 233 anl a,#0f0h
011F B4F007 =1 234 cjne a,#0f0h,key_hit
0122 EF =1 235 mov a,r7
0123 23 =1 236 rl a
0124 DEF2 =1 237 djnz r6,test
0126 C3 =1 238 clr c
0127 8015 =1 239 sjmp exit
=1 240
0129 =1 241 key_hit:
0129 FF =1 242 mov r7,a
012A 7404 =1 243 mov a,#4
012C C3 =1 244 clr c
012D 9E =1 245 subb a,r6
012E FE =1 246 mov r6,a
012F EF =1 247 mov a,r7
0130 C4 =1 248 swap a
0131 7D04 =1 249 mov r5,#4
0133 =1 250 again:
0133 13 =1 251 rrc a
0134 5006 =1 252 jnc done
0136 0E =1 253 inc r6
0137 0E =1 254 inc r6
0138 0E =1 255 inc r6
0139 0E =1 256 inc r6
013A DDF7 =1 257 djnz r5,again
013C =1 258 done:
013C D3 =1 259 setb c
013D EE =1 260 mov a,r6
013E =1 261 exit:
013E 22 =1 262 ret
=1 263 ;================================================================
=1 264 $ic(rom_sub.inc) ;24c04 read,write routine,based on Fairchild's app note 957
=1 265 ;*****************************
=1 266 ;*nm24c16 functional routines *
=1 267 ;*****************************
=1 268 ;******************************************************;*
=1 269 ;*write performs a byte write operation into the nm24c16. the routine *
=1 270 ;*expects the address to modify to be specified in the addlo and addhi *
=1 271 ;*variables. the new data value is specified in the rwdata variable. *
=1 272 ;********************************************************
013F =1 273 write:
013F 1201A4 =1 274 lcall start ;issue start condition
0142 E521 =1 275 mov a,addhi ;build slave address
011 PAGE 6

0144 23 =1 276 rl a
0145 44A0 =1 277 orl a,#0a0h
0147 1201D0 =1 278 lcall sendb ;send slave address
014A 1201CA =1 279 lcall ack ;get ack from nm24c16
014D E520 =1 280 mov a,addlo
014F 1201D0 =1 281 lcall sendb ;send low order address
0152 1201CA =1 282 lcall ack ;get ack from nm24c16
0155 E523 =1 283 mov a,rwdata
0157 1201D0 =1 284 lcall sendb ;send data value to write
015A 1201CA =1 285 lcall ack ;get ack from nm24c16
015D 1201B2 =1 286 lcall stop ;issue stop condition
0160 22 =1 287 ret
=1 288 ;******************************************************;*
=1 289 ;*poll performs acknowledge to determine when a write cycle has *
=1 290 ;*completed. the routine repeatedly issues a dummy slave address and *
=1 291 ;*checks for an acknowledge from the nm24c16. once the nm24c16 *
=1 292 ;*responds with an acknowledge the routine terminates. *
=1 293 ;********************************************************
0161 =1 294 poll:
0161 1201A4 =1 295 lcall start ;issue a start condition
0164 74A0 =1 296 mov a,#0a0h
0166 1201D0 =1 297 lcall sendb ;send the dummy slave address
0169 1201CA =1 298 lcall ack ;look for acknowledge from nm24c16
016C 40F3 =1 299 jc poll ;loop until acknowledge is received
016E 1201B2 =1 300 lcall stop ;issue stop condition
0171 22 =1 301 ret
=1 302 ;******************************************************;*
=1 303 ;*read perfoms a byte read from the address specified in the addhi *
=1 304 ;*and addlo variables. the data that is read is returned in the *
=1 305 ;*variable rwdata. *
=1 306 ;********************************************************
0172 =1 307 read:
0172 1201A4 =1 308 lcall start ;issue a start condition
0175 E521 =1 309 mov a,addhi ;issue slave address with r/w=0
0177 23 =1 310 rl a
0178 44A0 =1 311 orl a,#0a0h
017A 1201D0 =1 312 lcall sendb ;send slave address
017D 1201CA =1 313 lcall ack ;get ack from nm24c16
0180 E520 =1 314 mov a,addlo
0182 1201D0 =1 315 lcall sendb ;send low order address
0185 1201CA =1 316 lcall ack ;get ack from nm24c16
0188 1201A4 =1 317 lcall start ;issue start condition
018B E521 =1 318 mov a,addhi
018D 23 =1 319 rl a
018E 44A1 =1 320 orl a,#0a1h
0190 1201D0 =1 321 lcall sendb ;issue slave address with r/w=1
0193 1201CA =1 322 lcall ack ;get ack from nm24c16
0196 1201E2 =1 323 lcall readb ;read data byte
0199 F523 =1 324 mov rwdata,a ;put data into rwdata variable
019B D2A2 =1 325 setb sda ;clock in a 1 (no acknowledge)
019D 1201BE =1 326 lcall clock
01A0 1201B2 =1 327 lcall stop ;issue a stop condition
01A3 22 =1 328 ret
=1 329 ;******************************************************;*
=1 330 ;*start issues a start condition to the nm24c16. the routine makes *
=1 331 ;*sure that both sda and scl are high. then bring sda low first *
=1 332 ;*followed by bringing scl low. *
=1 333 ;********************************************************
011 PAGE 7

01A4 =1 334 start:
01A4 D2A2 =1 335 setb sda ;make sure sda and scl are high
01A6 D2A1 =1 336 setb scl
01A8 C2A2 =1 337 clr sda ;bring sda low
01AA 00 =1 338 nop ;nops assure correct timing
01AB 00 =1 339 nop
01AC 00 =1 340 nop
01AD 00 =1 341 nop
01AE 00 =1 342 nop
01AF C2A1 =1 343 clr scl ;bring scl low
01B1 22 =1 344 ret
=1 345 ;******************************************************;*
=1 346 ;*stop issues a stop condition to the nm24c16. the routine makes *
=1 347 ;*sure that the sda line is low before trying to issue the stop. *
=1 348 ;*the routine then brings scl high followed by bringing sda high. *
=1 349 ;********************************************************
01B2 =1 350 stop:
01B2 C2A2 =1 351 clr sda ;make sure sda is low
01B4 D2A1 =1 352 setb scl ;bring scl high
01B6 00 =1 353 nop ;nops assure correct timing
01B7 00 =1 354 nop
01B8 00 =1 355 nop
01B9 00 =1 356 nop
01BA 00 =1 357 nop
01BB D2A2 =1 358 setb sda ;bring sda high
01BD 22 =1 359 ret
=1 360 ;******************************************************;*
=1 361 ;*clock issues a clock pulse to the nm24c16. the state of sda is *
=1 362 ;*sampled before the clock pulse is issued. *
=1 363 ;********************************************************
01BE =1 364 clock:
01BE A2A2 =1 365 mov c,sda ;sample sda and put state in carry flag
01C0 D2A1 =1 366 setb scl ;bring scl high
01C2 00 =1 367 nop ;nops assure correct timing
01C3 00 =1 368 nop
01C4 00 =1 369 nop
01C5 00 =1 370 nop
01C6 00 =1 371 nop
01C7 C2A1 =1 372 clr scl ;bring scl low
01C9 22 =1 373 ret
=1 374 ;******************************************************;*
=1 375 ; ack allows the nm24c16 to send an acknowledge back to the 8031. *
=1 376 ;********************************************************
01CA =1 377 ack:
01CA D2A2 =1 378 setb sda ;bring sda high
01CC 1201BE =1 379 lcall clock ;issue a clock pulse
01CF 22 =1 380 ret
=1 381 ;******************************************************;*
=1 382 ;*sendb sends a byte to the nm24c16. the routine receives the data *
=1 383 ;*to send in the a register. *
=1 384 ;********************************************************
01D0 =1 385 sendb:
01D0 F522 =1 386 mov tdata,a ;move data to send into tdata
01D2 7408 =1 387 mov a,#8 ;8 bits to send
01D4 F524 =1 388 mov count,a ;store 8 in down counter
01D6 E522 =1 389 mov a,tdata ;return data to send into a register
01D8 =1 390 nextr:
01D8 33 =1 391 rlc a ;send most significant bit first
011 PAGE 8

01D9 92A2 =1 392 mov sda,c ;move bit to sda port
01DB 1201BE =1 393 lcall clock ;issue clock pulse
01DE D524F7 =1 394 djnz count,nextr ;loop 8 times
01E1 22 =1 395 ret
=1 396 ;******************************************************;*
=1 397 ;*readb reads a byte from the nm24c16. the routine returns the byte *
=1 398 ;*that is read in the a register. *
=1 399 ;********************************************************
01E2 =1 400 readb:
01E2 7408 =1 401 mov a,#8 ;8 bits to read
01E4 F524 =1 402 mov count,a ;store 8 in down counter
01E6 =1 403 nextw:
01E6 1201BE =1 404 lcall clock ;issue clock pulse
01E9 33 =1 405 rlc a ;store and shift data from sda
01EA D524F9 =1 406 djnz count,nextw ;loop 8 times
01ED 22 =1 407 ret
408
409
410 ;**************************************************************************
411 ;display digits from digit mask
412 ;**************************************************************************
413
01EE 414 display_0:
01EE 758082 415 mov led_out, #zero
01F1 22 416 ret
417
01F2 418 display_1:
01F2 7580DE 419 mov led_out, #mot
01F5 22 420 ret
421
01F6 422 display_2:
01F6 7580A8 423 mov led_out, #hai
01F9 22 424 ret
425
01FA 426 display_3:
01FA 7580C8 427 mov led_out, #ba
01FD 22 428 ret
429
01FE 430 display_4:
01FE 7580D4 431 mov led_out, #bon
0201 22 432 ret
433
0202 434 display_5:
0202 7580C1 435 mov led_out, #nam
0205 22 436 ret
437
0206 438 display_6:
0206 758081 439 mov led_out, #sau
0209 22 440 ret
441
020A 442 display_7:
020A 7580DA 443 mov led_out, #bay
020D 22 444 ret
445
020E 446 display_8:
020E 758080 447 mov led_out, #tam
0211 22 448 ret
449
011 PAGE 9

0212 450 display_9:
0212 7580C0 451 mov led_out, #chin
0215 22 452 ret
453
454 ;=============================================
455 ;this routine identify digits and display them
456 ;=============================================
457
0216 458 get_number:
0216 B40003 459 cjne a, #00h, so1 ; jump if not 0
0219 31EE 460 acall display_0
021B 22 461 ret
021C 462 so1:
021C B40103 463 cjne a, #01h, so2 ; jump if not 1
021F 31F2 464 acall display_1
0221 22 465 ret
0222 466 so2:
0222 B40203 467 cjne a, #02h, so3 ; jump if not 2
0225 31F6 468 acall display_2
0227 22 469 ret
0228 470 so3:
0228 B40303 471 cjne a, #03h, so4 ; jump if not 3
022B 31FA 472 acall display_3
022D 22 473 ret
022E 474 so4:
022E B40403 475 cjne a, #04h, so5 ; jump if not 4
0231 31FE 476 acall display_4
0233 22 477 ret
0234 478 so5:
0234 B40503 479 cjne a, #05h, so6 ; jump if not 5
0237 5102 480 acall display_5
0239 22 481 ret
023A 482 so6:
023A B40603 483 cjne a, #06h,so7 ; jump if not 6
023D 5106 484 acall display_6
023F 22 485 ret
0240 486 so7:
0240 B40703 487 cjne a, #07h, so8 ; jump if not 7
0243 510A 488 acall display_7
0245 22 489 ret
0246 490 so8:
0246 B40803 491 cjne a, #08h, so9 ; jump if not 8
0249 510E 492 acall display_8
024B 22 493 ret
024C 494 so9:
024C 5112 495 acall display_9 ; sure is nine
024E 22 496 ret
497
498 ;********* display thousand digit *********************************
024F 499 digit1:
024F 7580FF 500 mov led_out,#0ffh
0252 E525 501 mov a,dig1
0254 540F 502 anl a, #00fh
0256 5116 503 acall get_number
0258 C2A3 504 clr on1 ; turn on 5th digit
025A 1202B5 505 lcall delayms
025D D2A3 506 setb on1
025F 22 507 ret
011 PAGE 10

508
509 ;********* display thousand digit *********************************
0260 510 digit2:
0260 7580FF 511 mov led_out,#0ffh
0263 E526 512 mov a,dig2
0265 540F 513 anl a, #00fh
0267 5116 514 acall get_number
0269 C2A4 515 clr on2 ; turn on 4th digit
026B 1202B5 516 lcall delayms
026E D2A4 517 setb on2
0270 22 518 ret
519
520 ;********* display hundred digit ******************************
0271 521 digit3:
0271 852780 522 mov led_out,dig3
0274 C2A5 523 clr on3 ; turn on 3rd digit
0276 1202B5 524 lcall delayms
0279 D2A5 525 setb on3
027B 22 526 ret
527 ;******** display ten digit ***********************************
027C 528 digit4:
027C 7580FF 529 mov led_out,#0ffh
027F E528 530 mov a,dig4
0281 540F 531 anl a, #00Fh
0283 5116 532 acall get_number
0285 C2A6 533 clr on4
0287 1202B5 534 lcall delayms
028A D2A6 535 setb on4
028C 22 536 ret
537 ;*********display unit digit ****************************
028D 538 digit5:
028D 7580FF 539 mov led_out,#0ffh
0290 E529 540 mov a,dig5
0292 540F 541 anl a, #00fh
0294 5116 542 acall get_number
0296 C2A7 543 clr on5
0298 1202B5 544 lcall delayms
029B D2A7 545 setb on5
029D 22 546 ret
547 ;===========================================
548 ;this routine compare set info with stepper motor's
549 ;encoder output pulse if all digits equal zero then
550 ;finish
551 ;============================================
029E 552 compare:
029E E52D 553 mov a,set2
02A0 B52B11 554 cjne a,count2,lost
02A3 E52C 555 mov a,set1
02A5 B52A0C 556 cjne a,count1,lost
02A8 752C00 557 mov set1,#0
02AB 752D00 558 mov set2,#0
02AE D231 559 setb index
02B0 C232 560 clr drum_pulse
02B2 C2A8 561 clr ex0
02B4 562 lost:
02B4 22 563 ret
564
565 ;===================================
011 PAGE 11

566 ;1/1000 sec delay loop
567 ;====================================
568
02B5 569 delayms:
02B5 7A00 570 mov r2,#00h
02B7 571 loopa:
02B7 0A 572 inc r2
02B8 EA 573 mov a,r2
02B9 B4FFFB 574 cjne a,#0ffh,loopa
02BC 22 575 ret
576
577 ;another longer delay loop
578
02BD 579 delayms1:
02BD 7832 580 mov r0,#50
02BF 581 loopb:
02BF 1202B5 582 lcall delayms
02C2 D8FB 583 djnz r0,loopb
02C4 22 584 ret
585
586 ;=======================================
587 ; routine to show program saving steps
588 ;=======================================
589
02C5 590 show_prog:
02C5 E52C 591 mov a,set1
02C7 B40A0D 592 cjne a,#10,ok_do
02CA 752C00 593 mov set1,#00
02CD 052D 594 inc set2
02CF E52D 595 mov a,set2
02D1 B40A03 596 cjne a,#10,ok_do
02D4 752D00 597 mov set2,#00
02D7 598 ok_do:
02D7 22 599 ret
600 ;========================================
601 ;MOTOR control routines
602 ;========================================
02D8 603 forward:
02D8 D2B4 604 setb mrun
02DA C2B5 605 clr mdir
02DC 22 606 ret
02DD 607 reverse:
02DD D2B4 608 setb mrun
02DF D2B5 609 setb mdir
02E1 22 610 ret
02E2 611 no_move:
02E2 C2B4 612 clr mrun
02E4 C2B5 613 clr mdir
02E6 22 614 ret
615
616 ;========================================================
617
02E7 618 begin:
02E7 758134 619 mov sp,#34h
=1 620 $ic(main.inc)
=1 621 ;======================================
=1 622 ;the main.asm
=1 623 ;======================================
011 PAGE 12

02EA 120052 =1 624 lcall init_reg
02ED =1 625 std_by:
02ED 1202E2 =1 626 lcall no_move
02F0 7580B0 =1 627 mov led_out,#char_p
02F3 C2A3 =1 628 clr on1
02F5 1202B5 =1 629 lcall delayms
02F8 D2A3 =1 630 setb on1
02FA 1202B5 =1 631 lcall delayms
02FD 7580BD =1 632 mov led_out,#char_r
0300 C2A4 =1 633 clr on2
0302 1202B5 =1 634 lcall delayms
0305 D2A4 =1 635 setb on2
0307 1202B5 =1 636 lcall delayms
030A 7580C1 =1 637 mov led_out,#char_s
030D C2A5 =1 638 clr on3
030F 1202B5 =1 639 lcall delayms
0312 D2A5 =1 640 setb on3
0314 1202B5 =1 641 lcall delayms
0317 7580A5 =1 642 mov led_out,#char_t
031A C2A6 =1 643 clr on4
031C 1202B5 =1 644 lcall delayms
031F D2A6 =1 645 setb on4
0321 1202B5 =1 646 lcall delayms
0324 75808C =1 647 mov led_out,#char_d
0327 C2A7 =1 648 clr on5
0329 1202B5 =1 649 lcall delayms
032C D2A7 =1 650 setb on5
032E 1202B5 =1 651 lcall delayms
0331 30B105 =1 652 jnb save,set_prog0
0334 20A0B6 =1 653 jb pause,std_by
0337 61BA =1 654 ajmp operate
=1 655
=1 656
0339 =1 657 set_prog0:
0339 120040 =1 658 lcall init_baud
033C 120052 =1 659 lcall init_reg
033F 753000 =1 660 mov rom_count,#00h ;clear low order address register
0342 C2B7 =1 661 clr relay1 ;to prepare saving in eprom operatio
ns
0344 C2B6 =1 662 clr relay2
0346 C231 =1 663 clr index
0348 1202E2 =1 664 lcall no_move
034B D232 =1 665 setb drum_pulse
034D C2A8 =1 666 clr ex0
034F C2AA =1 667 clr ex1
0351 =1 668 set_prog: ;let the user knows what we are goin
g to do
0351 752FB0 =1 669 mov dsp_prog,#char_p
0354 1202C5 =1 670 lcall show_prog
0357 1200F8 =1 671 lcall in_hex ;read keypad be ready to write to eprom
035A 20B1F4 =1 672 jb save,set_prog
035D =1 673 checking:
035D 1202BD =1 674 lcall delayms1
0360 30B1FA =1 675 jnb save,checking
0363 C28C =1 676 clr tr0
0365 752100 =1 677 mov addhi,#00h ;24C04 so let hi order address be 00

0368 052E =1 678 inc reprom ;writing the first byte
011 PAGE 13

036A 852E20 =1 679 mov addlo,reprom
036D E52A =1 680 mov a,count1
036F F523 =1 681 mov rwdata,a
0371 12013F =1 682 lcall write
0374 752100 =1 683 mov addhi,#00h
0377 052E =1 684 inc reprom ;writing the second byte
0379 852E20 =1 685 mov addlo,reprom
037C E52B =1 686 mov a,count2
037E F523 =1 687 mov rwdata,a
0380 12013F =1 688 lcall write
0383 752A00 =1 689 mov count1,#00
0386 752B00 =1 690 mov count2,#00
0389 E52E =1 691 mov a,reprom
038B F530 =1 692 mov rom_count,a ;count the last two saving steps
038D 30A02A =1 693 jnb pause,operate ;and save in rom_count for future use
0390 =1 694 waitup: ;go to next two byte saving cycle
0390 D28C =1 695 setb tr0 ;also notify use what prog step he's
at
0392 20B0FB =1 696 jb next_set,waitup
0395 052C =1 697 inc set1
0397 6151 =1 698 ajmp set_prog
0399 22 =1 699 ret
=1 700
=1 701
039A =1 702 run: ;runs the motor and compare data rea
d from
039A D2A8 =1 703 setb ex0 ;eprom with data from motor encoder
read from
039C D2AA =1 704 setb ex1 ;count_up when all equal read two mo
re byte
039E 1202DD =1 705 lcall reverse ;and repeat operation until all steps done
03A1 12029E =1 706 lcall compare
03A4 103103 =1 707 jbc index,over
03A7 619A =1 708 ajmp run
03A9 22 =1 709 ret
03AA =1 710 over:
03AA D2B7 =1 711 setb relay1
03AC D2B6 =1 712 setb relay2
03AE 1202D8 =1 713 lcall forward
03B1 =1 714 over1:
03B1 1202E2 =1 715 lcall no_move
03B4 30320C =1 716 jnb drum_pulse,operate1
03B7 619A =1 717 ajmp run
03B9 22 =1 718 ret
03BA =1 719 operate: ;read back from eprom
03BA 120040 =1 720 lcall init_baud
03BD 120052 =1 721 lcall init_reg
03C0 752E00 =1 722 mov reprom,#00h
03C3 =1 723 operate1: ;read two byte in consecutive order

03C3 C28C =1 724 clr tr0
03C5 752FA5 =1 725 mov dsp_prog,#char_t ;let user know we are running
03C8 752100 =1 726 mov addhi,#00h
03CB 052E =1 727 inc reprom ;begin read fisrt byte
03CD 852E20 =1 728 mov addlo,reprom
03D0 120172 =1 729 lcall read
03D3 E523 =1 730 mov a,rwdata
03D5 F52A =1 731 mov count1,a
011 PAGE 14

03D7 752100 =1 732 mov addhi,#00h
03DA 052E =1 733 inc reprom ;read second byte in order indicated

03DC 852E20 =1 734 mov addlo,reprom ;by reprom register
03DF 120172 =1 735 lcall read
03E2 E523 =1 736 mov a,rwdata
03E4 F52B =1 737 mov count2,a
03E6 D28C =1 738 setb tr0
03E8 12039A =1 739 lcall run
03EB 22 =1 740 ret
03EC 22 741 ret
742 end

VERSION 1.2k ASSEMBLY COMPLETE, 0 ERRORS FOUND
011 PAGE 15

ACC. . . . . . . . . . . . . . . D ADDR 00E0H PREDEFINED
ACK. . . . . . . . . . . . . . . C ADDR 01CAH
ADDHI. . . . . . . . . . . . . . NUMB 0021H
ADDLO. . . . . . . . . . . . . . NUMB 0020H
AGAIN. . . . . . . . . . . . . . C ADDR 0133H
BA . . . . . . . . . . . . . . . NUMB 00C8H
BACK . . . . . . . . . . . . . . C ADDR 00FCH
BACK2. . . . . . . . . . . . . . C ADDR 0108H
BACK3. . . . . . . . . . . . . . C ADDR 010AH
BACK_SET . . . . . . . . . . . . B ADDR 0087H NOT USED
BAY. . . . . . . . . . . . . . . NUMB 00DAH
BEGIN. . . . . . . . . . . . . . C ADDR 02E7H
BON. . . . . . . . . . . . . . . NUMB 00D4H
CHAR_D . . . . . . . . . . . . . NUMB 008CH
CHAR_P . . . . . . . . . . . . . NUMB 00B0H
CHAR_R . . . . . . . . . . . . . NUMB 00BDH
CHAR_S . . . . . . . . . . . . . NUMB 00C1H
CHAR_T . . . . . . . . . . . . . NUMB 00A5H
CHECKING . . . . . . . . . . . . C ADDR 035DH
CHIN . . . . . . . . . . . . . . NUMB 00C0H
CLOCK. . . . . . . . . . . . . . C ADDR 01BEH
COMPARE. . . . . . . . . . . . . C ADDR 029EH
COUNT. . . . . . . . . . . . . . NUMB 0024H
COUNT1 . . . . . . . . . . . . . NUMB 002AH
COUNT2 . . . . . . . . . . . . . NUMB 002BH
COUNT_UP . . . . . . . . . . . . C ADDR 00AEH
DELAYMS. . . . . . . . . . . . . C ADDR 02B5H
DELAYMS1 . . . . . . . . . . . . C ADDR 02BDH
DIG1 . . . . . . . . . . . . . . NUMB 0025H
DIG2 . . . . . . . . . . . . . . NUMB 0026H
DIG3 . . . . . . . . . . . . . . NUMB 0027H
DIG4 . . . . . . . . . . . . . . NUMB 0028H
DIG5 . . . . . . . . . . . . . . NUMB 0029H
DIGIT1 . . . . . . . . . . . . . C ADDR 024FH
DIGIT2 . . . . . . . . . . . . . C ADDR 0260H
DIGIT3 . . . . . . . . . . . . . C ADDR 0271H
DIGIT4 . . . . . . . . . . . . . C ADDR 027CH
DIGIT5 . . . . . . . . . . . . . C ADDR 028DH
DIRECTION. . . . . . . . . . . . B ADDR 0033H NOT USED
DISPLAY_0. . . . . . . . . . . . C ADDR 01EEH
DISPLAY_1. . . . . . . . . . . . C ADDR 01F2H
DISPLAY_2. . . . . . . . . . . . C ADDR 01F6H
DISPLAY_3. . . . . . . . . . . . C ADDR 01FAH
DISPLAY_4. . . . . . . . . . . . C ADDR 01FEH
DISPLAY_5. . . . . . . . . . . . C ADDR 0202H
DISPLAY_6. . . . . . . . . . . . C ADDR 0206H
DISPLAY_7. . . . . . . . . . . . C ADDR 020AH
DISPLAY_8. . . . . . . . . . . . C ADDR 020EH
DISPLAY_9. . . . . . . . . . . . C ADDR 0212H
DONE . . . . . . . . . . . . . . C ADDR 013CH
DONE1. . . . . . . . . . . . . . C ADDR 0111H
DRUM_COUNT . . . . . . . . . . . C ADDR 00DEH
DRUM_PULSE . . . . . . . . . . . B ADDR 0032H
DRUM_TURN. . . . . . . . . . . . B ADDR 00B2H NOT USED
DSP_PROG . . . . . . . . . . . . NUMB 002FH
EA . . . . . . . . . . . . . . . B ADDR 00AFH PREDEFINED
ENCODER. . . . . . . . . . . . . B ADDR 00B3H NOT USED
ET0. . . . . . . . . . . . . . . B ADDR 00A9H PREDEFINED
011 PAGE 16

EX0. . . . . . . . . . . . . . . B ADDR 00A8H PREDEFINED
EX1. . . . . . . . . . . . . . . B ADDR 00AAH PREDEFINED
EXIT . . . . . . . . . . . . . . C ADDR 013EH
FORWARD. . . . . . . . . . . . . C ADDR 02D8H
GET_KEY. . . . . . . . . . . . . C ADDR 0114H
GET_NUMBER . . . . . . . . . . . C ADDR 0216H
HAI. . . . . . . . . . . . . . . NUMB 00A8H
INDEX. . . . . . . . . . . . . . B ADDR 0031H
INIT_BAUD. . . . . . . . . . . . C ADDR 0040H
INIT_REG . . . . . . . . . . . . C ADDR 0052H
IN_HEX . . . . . . . . . . . . . C ADDR 00F8H
IT0. . . . . . . . . . . . . . . B ADDR 0088H PREDEFINED
IT1. . . . . . . . . . . . . . . B ADDR 008AH PREDEFINED
KEY_HIT. . . . . . . . . . . . . C ADDR 0129H
KEY_PORT . . . . . . . . . . . . NUMB 0090H
LED_OUT. . . . . . . . . . . . . NUMB 0080H
LOOPA. . . . . . . . . . . . . . C ADDR 02B7H
LOOPB. . . . . . . . . . . . . . C ADDR 02BFH
LOST . . . . . . . . . . . . . . C ADDR 02B4H
MDIR . . . . . . . . . . . . . . B ADDR 00B5H
MOT. . . . . . . . . . . . . . . NUMB 00DEH
MRUN . . . . . . . . . . . . . . B ADDR 00B4H
NAM. . . . . . . . . . . . . . . NUMB 00C1H
NEXTR. . . . . . . . . . . . . . C ADDR 01D8H
NEXTW. . . . . . . . . . . . . . C ADDR 01E6H
NEXT_SET . . . . . . . . . . . . B ADDR 00B0H
NO_MOVE. . . . . . . . . . . . . C ADDR 02E2H
OK_DO. . . . . . . . . . . . . . C ADDR 02D7H
ON1. . . . . . . . . . . . . . . B ADDR 00A3H
ON2. . . . . . . . . . . . . . . B ADDR 00A4H
ON3. . . . . . . . . . . . . . . B ADDR 00A5H
ON4. . . . . . . . . . . . . . . B ADDR 00A6H
ON5. . . . . . . . . . . . . . . B ADDR 00A7H
OPERATE. . . . . . . . . . . . . C ADDR 03BAH
OPERATE1 . . . . . . . . . . . . C ADDR 03C3H
OVER . . . . . . . . . . . . . . C ADDR 03AAH
OVER1. . . . . . . . . . . . . . C ADDR 03B1H NOT USED
P0 . . . . . . . . . . . . . . . D ADDR 0080H PREDEFINED
P1 . . . . . . . . . . . . . . . D ADDR 0090H PREDEFINED
P2 . . . . . . . . . . . . . . . D ADDR 00A0H PREDEFINED
P3 . . . . . . . . . . . . . . . D ADDR 00B0H PREDEFINED
PAUSE. . . . . . . . . . . . . . B ADDR 00A0H
POLL . . . . . . . . . . . . . . C ADDR 0161H
PSW. . . . . . . . . . . . . . . D ADDR 00D0H PREDEFINED
READ . . . . . . . . . . . . . . C ADDR 0172H
READB. . . . . . . . . . . . . . C ADDR 01E2H
RELAY1 . . . . . . . . . . . . . B ADDR 00B7H
RELAY2 . . . . . . . . . . . . . B ADDR 00B6H
REPROM . . . . . . . . . . . . . NUMB 002EH
REVERSE. . . . . . . . . . . . . C ADDR 02DDH
ROM_COUNT. . . . . . . . . . . . NUMB 0030H
RUN. . . . . . . . . . . . . . . C ADDR 039AH
RWDATA . . . . . . . . . . . . . NUMB 0023H
SAU. . . . . . . . . . . . . . . NUMB 0081H
SAVE . . . . . . . . . . . . . . B ADDR 00B1H
SCL. . . . . . . . . . . . . . . B ADDR 00A1H
SDA. . . . . . . . . . . . . . . B ADDR 00A2H
SENDB. . . . . . . . . . . . . . C ADDR 01D0H
011 PAGE 17

SET1 . . . . . . . . . . . . . . NUMB 002CH
SET2 . . . . . . . . . . . . . . NUMB 002DH
SET_PROG . . . . . . . . . . . . C ADDR 0351H
SET_PROG0. . . . . . . . . . . . C ADDR 0339H
SHOW_PROG. . . . . . . . . . . . C ADDR 02C5H
SO1. . . . . . . . . . . . . . . C ADDR 021CH
SO2. . . . . . . . . . . . . . . C ADDR 0222H
SO3. . . . . . . . . . . . . . . C ADDR 0228H
SO4. . . . . . . . . . . . . . . C ADDR 022EH
SO5. . . . . . . . . . . . . . . C ADDR 0234H
SO6. . . . . . . . . . . . . . . C ADDR 023AH
SO7. . . . . . . . . . . . . . . C ADDR 0240H
SO8. . . . . . . . . . . . . . . C ADDR 0246H
SO9. . . . . . . . . . . . . . . C ADDR 024CH
SP . . . . . . . . . . . . . . . D ADDR 0081H PREDEFINED
START. . . . . . . . . . . . . . C ADDR 01A4H
STD_BY . . . . . . . . . . . . . C ADDR 02EDH
STOP . . . . . . . . . . . . . . C ADDR 01B2H
TAM. . . . . . . . . . . . . . . NUMB 0080H
TDATA. . . . . . . . . . . . . . NUMB 0022H
TEST . . . . . . . . . . . . . . C ADDR 0118H
TH0. . . . . . . . . . . . . . . D ADDR 008CH PREDEFINED
TL0. . . . . . . . . . . . . . . D ADDR 008AH PREDEFINED
TMOD . . . . . . . . . . . . . . D ADDR 0089H PREDEFINED
TR0. . . . . . . . . . . . . . . B ADDR 008CH PREDEFINED
UPDATE . . . . . . . . . . . . . C ADDR 0081H
WAITUP . . . . . . . . . . . . . C ADDR 0390H
WRITE. . . . . . . . . . . . . . C ADDR 013FH
XONG_ISR . . . . . . . . . . . . C ADDR 00D7H
ZERO . . . . . . . . . . . . . . NUMB 0082H