| ??? 06/06/06 10:33 Read: times |
#117846 - per-pin, per-port, and whole-chip limits Responding to: ???'s previous message |
Abhishek Bk said:
The Port 1 output buffers can sink/source four TTL inputs. Does this mean that that though there are 8 pins in a port only 4 pins can be used as inputs/outputs at a time? No: in this case, each pin in Port 1 can drive a load of up to 4 TTL inputs (or equivalent). But you are thinking well to be concerned - there are some cases where there are per-pin ratings, but not all pins can be used at this full rating simulataneously; eg, look at Note 1 at the foot of the "DC Characteristics" Table (it's on p10 in my copy): you will see that there's a maximum IOL of 10mA per pin, but an overall port limit of 26mA (Port 0) or 15mA (Ports 1-3). There is also a maximum total for the whole chip of 71mA. These things basically boil down to power dissipation. |
| Topic | Author | Date |
| Help Understanding AT89C51 Datasheet | 01/01/70 00:00 | |
| logic gain and other | 01/01/70 00:00 | |
| Should I study more? | 01/01/70 00:00 | |
| do you have any hardware knowledge | 01/01/70 00:00 | |
| No hardware knowledge | 01/01/70 00:00 | |
| what purpose? | 01/01/70 00:00 | |
| Purpose | 01/01/70 00:00 | |
| many get confused by this | 01/01/70 00:00 | |
| Got it ! | 01/01/70 00:00 | |
| per-pin, per-port, and whole-chip limits | 01/01/70 00:00 | |
| strictly speaking... | 01/01/70 00:00 | |
| Slight oversimplification | 01/01/70 00:00 | |
| it used to be DC, now it is AC | 01/01/70 00:00 | |
"per pin" | 01/01/70 00:00 | |
| Good post! | 01/01/70 00:00 | |
| Excellent Community | 01/01/70 00:00 | |
| have you read "the bible" | 01/01/70 00:00 | |
| Yes, I have started | 01/01/70 00:00 |