| ??? 07/20/06 12:11 Read: times Msg Score: +2 +2 Informative |
#120663 - 16x128 LED sign firmware |
Here's my 16x128 LED sign firmware. I thought maybe I should put it here. As an excuse to thank ALL those who helped me. I reckon it would be unfair not to offer my special bestest super-duper thanks to: Eric Malund, Oleg Sergeev, Kai Klaas, Russell Bull, Jan Waclawek for their posts. I'm wholeheartedly open to contributions/comments/suggestions/questions/criticisms. With a little help of Craig/Steve I might even have enough space to upload some photos/videos of LED modules, LED drivers and whatnot. ;-------------------------------------------------------------------------------; ; L E D S I G N F I R M W A R E ; ;-------------------------------------------------------------------------------; ;Source file: LED SIGN.ASM ;Version: 1.0 ;Date: Feb. 2006 ;Application: AT89C51ED2 in X2 Mode @ 11.0592MHz, All peripherals in X2 mode ;IDE: Keil uVision v2.4 ;Toolchain: FLIP v2.4.4 ;Author: payam7777777@hotmail.com ;Major Changes: . ;-------------------------------------------------------------------------------; ; I N T E R R U P T M A P ; ;-------------------------------------------------------------------------------; ;TASK |SOURCE |PRIORTY|FREQ. |LENGTH |CPU |STACK |ALTERS ; ;EFFECTS|TIMER0 |2 |28.12Hz|27.13us|.08 %|2 BYTES|NOTHING BUT GLOBALS ; ;EXTRACT|TIMER1 |1 |28.12Hz|62.39us|.17 %|5 BYTES|NOTHING BUT GLOBALS ; ;RECEIVE|SERIAL |3 |11520Hz|18.44us|21.25 %|2 BYTES|NOTHING BUT GLOBALS ; ;REFRESH|TIMER2 |0 |1600 Hz|315.7us|50.52 %|5 BYTES|NOTHING BUT GLOBALS ; ;-------------------------------------------------------------------------------; ; R E G I S T E R U S A G E ; ;-------------------------------------------------------------------------------; ;R0 Reloade by TWINKLE value ;R1 TWKDLY ;R2 Low byte (DPL) of RAM start address of the displayed text ;R3 High byte (DPH) of RAM start address of the displayed text ;R4 Four bit value to 154s ;R5 CCAP1L & CCAP1H value for effects ISR ;R6 CCAP1L & CCAP1H value for INITPCA routine ;R7 TWINKLE value ;-------------------------------------------------------------------------------; ; A T 8 9 C 5 1 E D 2 S F R S ; ;-------------------------------------------------------------------------------; P0 DATA 80H SP DATA 81H DPL DATA 82H DPH DATA 83H PCON DATA 87H TCON DATA 88H TF1 BIT TCON.7 TR1 BIT TCON.6 TF0 BIT TCON.5 TR0 BIT TCON.4 IE1 BIT TCON.3 IT1 BIT TCON.2 IE0 BIT TCON.1 IT0 BIT TCON.0 TMOD DATA 89H TL0 DATA 8AH TL1 DATA 8BH TH0 DATA 8CH TH1 DATA 8DH AUXR DATA 8EH CKCON0 DATA 8FH P1 DATA 90H CEX4 BIT P1.7 CEX3 BIT P1.6 CEX2 BIT P1.5 CEX1 BIT P1.4 CEX0 BIT P1.3 ECI BIT P1.2 T2EX BIT P1.1 T2 BIT P1.0 CKRL DATA 97H SCON DATA 98H FESM0 BIT SCON.7 SM1 BIT SCON.6 SM2 BIT SCON.5 REN BIT SCON.4 TB8 BIT SCON.3 RB8 BIT SCON.2 TI BIT SCON.1 RI BIT SCON.0 SBUF DATA 99H BRL DATA 9AH BDRCON DATA 9BH KBLS DATA 9CH KBE DATA 9DH KBF DATA 9EH P2 DATA 0A0H AUXR1 DATA 0A2H WDTRST DATA 0A6H WDTPRG DATA 0A7H IEN0 DATA 0A8H EA BIT IEN0.7 EC BIT IEN0.6 ET2 BIT IEN0.5 ES BIT IEN0.4 ET1 BIT IEN0.3 EX1 BIT IEN0.2 ET0 BIT IEN0.1 EX0 BIT IEN0.0 SADDR DATA 0A9H CKCON1 DATA 0AFH P3 DATA 0B0H RD BIT P3.7 WR BIT P3.6 T1 BIT P3.5 T0 BIT P3.4 INT1 BIT P3.3 INT0 BIT P3.2 TXD BIT P3.1 RXD BIT P3.0 IEN1 DATA 0B1H IPL1 DATA 0B2H IPH1 DATA 0B3H IPH0 DATA 0B7H IPL0 DATA 0B8H PPCL BIT IPL0.6 PT2L BIT IPL0.5 PLS BIT IPL0.4 PT1L BIT IPL0.3 PX1L BIT IPL0.2 PT0L BIT IPL0.1 PX0L BIT IPL0.0 SADEN DATA 0B9H SPCON DATA 0C3H SPSTA DATA 0C4H SPDAT DATA 0C5H T2CON DATA 0C8H TF2 BIT T2CON.7 EXF2 BIT T2CON.6 RCLK BIT T2CON.5 TCLK BIT T2CON.4 EXEN2 BIT T2CON.3 TR2 BIT T2CON.2 CT2 BIT T2CON.1 CPRL2 BIT T2CON.0 T2MOD DATA 0C9H RCAP2L DATA 0CAH RCAP2H DATA 0CBH TL2 DATA 0CCH TH2 DATA 0CDH PSW DATA 0D0H CY BIT PSW.7 AC BIT PSW.6 F0 BIT PSW.5 RS1 BIT PSW.4 RS0 BIT PSW.3 OV BIT PSW.2 F1 BIT PSW.1 P BIT PSW.0 FCON DATA 0D1H EECON DATA 0D2H CCON DATA 0D8H CF BIT CCON.7 CR BIT CCON.6 CCF4 BIT CCON.4 CCF3 BIT CCON.3 CCF2 BIT CCON.2 CCF1 BIT CCON.1 CCF0 BIT CCON.0 CMOD DATA 0D9H CCAPM0 DATA 0DAH CCAPM1 DATA 0DBH CCAPM2 DATA 0DCH CCAPM3 DATA 0DDH CCAPM4 DATA 0DEH ACC DATA 0E0H CL DATA 0E9H CCAP0L DATA 0EAH CCAP1L DATA 0EBH CCAP2L DATA 0ECH CCAP3L DATA 0EDH CCAP4L DATA 0EEH B DATA 0F0H CH DATA 0F9H CCAP0H DATA 0FAH CCAP1H DATA 0FBH CCAP2H DATA 0FCH CCAP3H DATA 0FDH CCAP4H DATA 0FEH ;-------------------------------------------------------------------------------; ; D A T A D E F I N I T I O N S ; ;-------------------------------------------------------------------------------; DLYCNTR DATA 30H ;OFF between fade out->in DELAYER DATA 31H ;HOLD, FLASH, FADE time DIVIDER DATA 32H ; MGLTLO DATA 33H ;MessageLengthLow MGLTHI DATA 34H ;MessageLengthHigh SPADCN DATA 35H ;Special address counter NXFCAL DATA 36H ;NextEffectAddrLow NXFCAH DATA 37H ;NextEffectAddrHigh FF00 DATA 38H ;ORLed with data to turn the LEDs on while receive REVRSIE DATA 39H ;XRLed with data to complement LEDs ;-------------------------------------------------------------------------------; ; B I T D E F I N I T I O N S ; ;-------------------------------------------------------------------------------; BYTE0 BIT P1.0 ;Decoder select bit 0 BYTE1 BIT P1.1 ;Decoder select bit 1 BYTE2 BIT P1.2 ;Decoder select bit 2 BYTE3 BIT P1.3 ;Decoder select bit 3 OFF BIT P1.4 ;To turn on/off the display and to PWM it A16 BIT P3.3 ;A16 line to SRAM STROBE BIT P3.5 ;Strobe to HC595s LED BIT P3.4 ;Debug LED DRCTION BIT 00H ;Fade in or fade out HDRING BIT 01H ;Header-in-progress flag TXTING BIT 02H ;Text-in-progress flag TW55AA BIT 03H ;Is twinkle value 55H or AAH HOLD BIT 10H ;Scroll flag FLASH BIT 11H ;Flash flag FADE BIT 12H ;Fade flag TWINKLE BIT 13H ;Twinkle flag SPARKLE BIT 14H ;Sparkle flag ;-------------------------------------------------------------------------------; ; I N T E R R U P T V E C T O R S ; ;-------------------------------------------------------------------------------; ORG 0000H ;Power on / RESET JMP MAIN ;Main loop ORG 0003H ;Exrernal0 interrupt JMP XHNDLR ;Exception/Error handler ORG 000BH ;Timer0 interrupt JMP T0ISR ;Timer0 ISR ORG 0013H ;Exrernal1 interrupt JMP XHNDLR ;Exception/Error handler ORG 001BH ;Timer1 interrupt JMP T1ISR ;Exception/Error handler ORG 0023H ;Serial interrupt JMP SERISR ;Serial ISR ORG 002BH ;Timer2 interrupt JMP T2ISR ;Timer2 ISR ORG 0033H ;PCA interrupt JMP XHNDLR ;Exception/Error handler ORG 003BH ;Keyboard interrupt JMP XHNDLR ;Exception/Error handler ORG 0043H ;- JMP XHNDLR ;Exception/Error handler ORG 004BH ;SPI interrupt JMP XHNDLR ;Exception/Error handler ;-------------------------------------------------------------------------------; ; E F F E C T S I S R ; ;-------------------------------------------------------------------------------; T0ISR: PUSH PSW ;24 PUSH ACC ;24 MOV A,R5 ;12 FlashFade, (R5 Current duty cycle) JNB DRCTION,DESC ;24 If descending (fading out) ASC: ADD A,#17 ;CCAP1H+=17 CJNE A,#0FFH,ITSOVER ;If reached the high end... CLR DRCTION ;Set direction to descending and... JMP ITSOVER ;Get the heck outa here DESC: JNZ N00H ;24 If reached the low end DJNZ DLYCNTR,ITSOVER ;24 Decrement DelayCounter and leave SETB DRCTION ;12 Otherwise set direction to ascending and... MOV DLYCNTR,#4 ;24 Reinitialize DelayCounter for futur use CLR A ;12 Turn the display completely off for a while JMP ITSOVER ;24 Get out N00H: CLR C ;CLR carry prior to SUB SUBB A,#15 ;CCAP1H-=15 ITSOVER:MOV R5,A ;12 JB FADE,ONIT ;24 If FADE goto FADIT otherwise... MOV A,#0FFH ;12 MOV R5,A ;12 CLR DRCTION ;12 and set direction to descending ONIT: MOV CCAP1H,A ;12 set duty cycle to OFF MOV R6,A ;12 For INITPCA routine JNB FLASH,NOFLASH ;24 DJNZ DIVIDER,NOTZER ;24 MOV DIVIDER,#0FH ;24 NOTZER: MOV A,DIVIDER ;12 MOV CCAP1H,#00H ;24 MOV R6,#00H ;12 CJNE A,#07H,COMPARE ;24 COMPARE:JC NOFLASH ;24 MOV CCAP1H,#0FFH ;24 MOV R6,#0FFH ;12 NOFLASH:JNB SPARKLE,NOSPARK ;24 DJNZ DIVIDER,NOTZERO MOV DIVIDER,#0FH NOTZERO:MOV A,DIVIDER MOV REVRSIE,#0FFH CJNE A,#03H,RESULT RESULT: JC NOSPARK MOV REVRSIE,#00H NOSPARK:POP ACC ;24 POP PSW ;24 RETI ;24 ;-------------------------------------------------------------------------------; ; E X T R A C T I S R ; ;-------------------------------------------------------------------------------; T1ISR: PUSH PSW ;24 EXTRACT/APPLY/INCNDX/ISITEND PUSH ACC ;24 PUSH B ;24 PUSH DPL ;24 PUSH DPH ;24 MOV A,SPADCN ;12 Is it a special address MOV B,#03H ;24 MUL AB ;48 MOV DPL,A ;12 MOV DPH,B ;12 INC DPTR ;24 INC DPTR ;24 INC DPTR ;24 SETB A16 ;12 MOVX A,@DPTR ;24 CLR A16 ;12 MOV NXFCAL,A ;12 INC DPTR ;24 SETB A16 ;12 MOVX A,@DPTR ;24 CLR A16 ;12 MOV NXFCAH,A ;12 MOV A,R2 ;12 CJNE A,NXFCAL,HELLOUT;24 MOV A,R3 ;12 CJNE A,NXFCAH,HELLOUT;24 ITSTYPE:INC DPTR ;24 If it is a special addres then extract effect SETB A16 ;12 MOVX A,@DPTR ;24 CLR A16 ;12 RL A ;12 MOV DPTR,#JMPTBL ;24 JMP @A+DPTR ;24 JMPTBL: JMP APLYMV ;24 JMP APLYHD JMP APLYFL JMP APLYFD JMP APLYTW JMP APLYSP APLYMV: CLR HOLD ;12 CLR FLASH ;12 CLR FADE ;12 CLR TWINKLE ;12 CLR SPARKLE ;12 JMP HELLOUT ;24 APLYHD: SETB HOLD CLR FLASH CLR FADE CLR TWINKLE CLR SPARKLE JMP HELLOUT APLYFL: CLR HOLD SETB FLASH CLR FADE CLR TWINKLE CLR SPARKLE JMP HELLOUT APLYFD: CLR HOLD CLR FLASH SETB FADE CLR TWINKLE CLR SPARKLE JMP HELLOUT APLYTW: CLR HOLD CLR FLASH CLR FADE SETB TWINKLE CLR SPARKLE JMP HELLOUT APLYSP: CLR HOLD CLR FLASH CLR FADE CLR TWINKLE SETB SPARKLE JMP HELLOUT HELLOUT:CLR C ;12 If no effect then do nothing else inc index by 2 MOV C,HOLD ;12 ORL C,FLASH ;12 ORL C,FADE ;12 ORL C,TWINKLE ;12 ORL C,SPARKLE ;12 JNC JUSTINC ;24 DJNZ DELAYER,LEAVEIT ;24 MOV DELAYER,#7FH ;24 INC SPADCN ;12 CLR HOLD ;12 CLR FLASH ;12 CLR FADE ;12 CLR TWINKLE ;12 CLR SPARKLE ;12 JUSTINC:MOV DPL,R2 ;24 MOV DPH,R3 ;24 INC DPTR ;24 INC DPTR ;24 MOV R2,DPL ;24 MOV R3,DPH ;24 LEAVEIT:MOV A,R2 ;12 If end of message then reset the whole thing CJNE A,MGLTLO,GETBACK;24 MOV A,R3 ;12 CJNE A,MGLTHI,GETBACK;24 JB HDRING,GETBACK ;24 Shouldn't reset if receive in progress JB TXTING,GETBACK ;24 Shouldn't reset if receive in progress JMP XHNDLR GETBACK:POP DPH ;24 POP DPL ;24 POP B ;24 POP ACC ;24 POP PSW ;24 RETI ;24 ;-------------------------------------------------------------------------------; ; S E R I A L I S R ; ;-------------------------------------------------------------------------------; SERISR: PUSH PSW ;24 PUSH ACC ;24 CLR RI ;12 MOV A,SBUF ;12 INC AUXR1 ;12 DPTR1 only for serial operations JB HDRING,DOHDR ;24 JB TXTING,DOTXT CJNE A,#55H,JUSTGO ;If the 1st byte is not 55H dont receive anything CLR HOLD CLR FLASH SETB FADE CLR TWINKLE CLR SPARKLE MOV FF00,#0FFH SETB HDRING JMP JUSTGO DOHDR: SETB A16 ;12 Header is put in higer half of SRAM MOVX @DPTR,A ;24 Put received character in next location in RAM CLR A16 ;12 Text is put in lower half of SRAM INC DPTR ;24 MOV A,#83H ;12 If received 387 bytes of header goto receive text CJNE A,DPL,JUSTGO ;24 MOV A,#01H ;12 CJNE A,DPH,JUSTGO ;24 CLR HDRING ;12 SETB TXTING ;12 MOV DPTR,#0000H ;24 JMP JUSTGO ;24 DOTXT: MOVX @DPTR,A ;Put received character in next location in RAM INC DPTR CLR A ;If end of receive then reset the thing CJNE A,DPL,JUSTGO CJNE A,DPH,JUSTGO JMP XHNDLR JUSTGO: INC AUXR1 ;12 DPTR0 for others POP ACC ;24 POP PSW ;24 RETI ;24 ;-------------------------------------------------------------------------------; ; R E F R E S H I S R ; ;-------------------------------------------------------------------------------; T2ISR: PUSH PSW ;24 PUSH ACC ;24 PUSH B ;24 PUSH DPL ;24 PUSH DPH ;24 CLR TF2 ;12 MOV DPL,R2 ;24 DPTR <- RAM start address of the displayed text MOV DPH,R3 ;24 MOV A,R4 ;12 DPTR <- DPTR+R4*2 RL A ;12 CLR C ;12 ADD A,DPL ;12 MOV DPL,A ;12 MOV A,DPH ;12 ADDC A,#00H ;12 MOV DPH,A ;12 MOV R0,#0FFH ;12 MOV B,#10H ;24 32 bytes to be spi-written to 595s ~3us each FILL_IT:JNB TWINKLE,NOTWNKL ;24 If TWINKLE then ANL data with AA or 55 DJNZ R1,NOSHIFT ;24 MOV R1,#1FH ;12 XCH A,R7 ;12 RL A ;12 XCH A,R7 ;12 NOSHIFT:MOV 0,7 ;12 NOTWNKL:MOVX A,@DPTR ;24 ANL A,R0 ;12 XRL A,REVRSIE ;12 ORL A,FF00 ;12 If receive-in-proress put FFH on the display MOV SPDAT,A ;12 Put byte INC DPTR ;24 MOVX A,@DPTR ;24 ANL A,R0 ;12 XRL A,REVRSIE ;12 ORL A,FF00 ;12 If receive-in-proress put FFH on the display MOV SPDAT,A ;12 Put byte MOV A,#1FH ;12 DPTR <- DPTR+1FH CLR C ;12 ADD A,DPL ;12 MOV DPL,A ;12 MOV A,DPH ;12 ADDC A,#00H ;12 MOV DPH,A ;12 DJNZ B,FILL_IT ;24 Repeat until all 32 bytes done MOV A,R4 ;12 RRC A ;12 MOV CCAPM1,#0H ;24 Turn OFF display by DeInitializing PCA CLR CR ;12 SETB OFF ;12 MOV BYTE0,C ;24 Put 4X16 value on P1.0-3 (BYTE0..BYTE3) RRC A ;12 MOV BYTE1,C ;24 RRC A ;12 MOV BYTE2,C ;24 RRC A ;12 MOV BYTE3,C ;24 SETB STROBE ;12 Hit strobe MOV CMOD,#00H ;24 Turn ON display by ReInitializing PCA MOV CCAPM1,#42H ;24 Initializing PCA module1 for PWM MOV CCAP1L,R6 ;24 Duty cycle held in R6 MOV CCAP1H,R6 ;24 Duty cycle held in R6 SETB CR ;12 Turn the PCA timer on CLR STROBE ;12 INC R4 ;12 Increment four bit value to the 154s++ CJNE R4,#10H,BYPASS ;24 MOV R4,#0 ;12 BYPASS: POP DPH ;24 POP DPL ;24 POP B ;24 POP ACC ;24 POP PSW ;24 RETI ;24 ;-------------------------------------------------------------------------------; ; M A I N ; ;-------------------------------------------------------------------------------; MAIN: MOV SP,#7FH ;The begining of upper 128 (accessed indirectly) CALL INITMSC ;Initialize misc. controller registers CALL INITMR0 ;Initialize Timer0 in 16-bit mode @ 28Hz CALL INITMR1 ;Initialize Timer1 CALL INITMR2 ;Initialize Timer2 in 16-bit autoreload mode @ 1600Hz CALL INITSRL ;Initialize Serial@ 9600 (Mode 1, IBDRG) CALL INITPCA ;Initialize PCA CALL INITSPI ;Initialize SPI CALL INITDOG ;Initialize Watchdog LOOP: MOV WDTRST,#1EH ;Feed it in the 1st place, but... MOV WDTRST,#0E1H ;since it still plans to bark, give it a kick JMP LOOP ;-------------------------------------------------------------------------------; ; I N I T M S C S U B R O U T I N E ; ;-------------------------------------------------------------------------------; INITMSC:MOV AUXR,#03H ;ALE disabled, Exp. RAM disabled, normal MOVX ORL CKCON0,#01H ;CPU in X2 ANL CKCON0,#01H ;T0, T1, T2, S, PCA, WD and ... ANL CKCON1,#00H ;SPI in X2 MOV IPH0,#00010010B ;- PPCH PT2H PSH PT1H PX1H PT0H PX0H MOV IPL0,#00011000B ;Serial, Timer0, Timer1, Timer2 CLR P3.2 ;Unused pin prorammed as output to prevent noise SETB OFF ;Reduce initial load on PS, Let PCA drive the pin CLR STROBE ;Initialized to low MOV R0,#0FFH ;Reloaded by R7 (55AA) value MOV R1,#1FH ;Delay of TWINKLE MOV R2,#00H ;Initialize RAM start address of the displayed text MOV R3,#00H ;Initialize RAM start address of the displayed text MOV R4,#00H ;Initial value of Four bit value to 154s MOV R5,#0FFH ;Initialize CCAP1H value MOV R6,#0FFH ;Initialize CCAP1L & CCAP1H value for INITPCA MOV R7,#0AAH ;55AA value FOR TWINKLE MOV DLYCNTR,#4 ;Fade out->in delay MOV DELAYER,#7FH ;HOLD, FLASH, FADE time MOV DIVIDER,#0FH ; MOV REVRSIE,#00H ; CLR DRCTION ;Fading initial direction is descending CLR HDRING ;Header-in-progress flag is initially zero CLR TXTING ;Text-in-progress flag is initially zero MOV SPADCN,#00H ;Special address counter MOV FF00,#00H ;ORLed with data (For full fade while RCVING) MOV DPTR,#0000H ;Read message length SETB A16 MOVX A,@DPTR CLR A16 MOV MGLTLO,A INC DPTR SETB A16 MOVX A,@DPTR CLR A16 MOV MGLTHI,A CLR HOLD CLR FLASH CLR FADE CLR TWINKLE CLR SPARKLE SETB LED RET ;-------------------------------------------------------------------------------; ; I N I T M R 0 S U B R O U T I N E ; ;-------------------------------------------------------------------------------; INITMR0:ANL TMOD,#0F0H ;Timer 0 mode 1 (16 bit) ORL TMOD,#01H ;GATE0=0, C/T0#=0, M10=0, M00=1 MOV TH0,#00H ;Init values MOV TL0,#00H ;Interrupt after 65536 machine cycles: 28.125Hz SETB ET0 ;Enable timer0 interrupt SETB EA ;Enable interrupts SETB TR0 ;Timer0 run RET ;-------------------------------------------------------------------------------; ; I N I T M R 1 S U B R O U T I N E ; ;-------------------------------------------------------------------------------; INITMR1:ANL TMOD,#0FH ;Timer 1 mode 1 (16 bit) ORL TMOD,#10H ;GATE0=0, C/T0#=0, M10=0, M00=1 MOV TH1,#00H ;Init values MOV TL1,#00H ;Interrupt after 65536 machine cycles: 28.125Hz SETB ET1 ;Enable timer1 interrupt SETB EA ;Enable interrupts SETB TR1 ;Timer1 run RET ;-------------------------------------------------------------------------------; ; I N I T M R 2 S U B R O U T I N E ; ;-------------------------------------------------------------------------------; INITMR2:ANL T2MOD,#0FCH ;DCEN=0 => Just up counter, T2OE=0 => P1.0 usable CLR EXF2 ;Reset flag in T2CON CLR TCLK ;Timer 2 is niether the transmit clock generator... CLR RCLK ;... nor the receive clock generator(in T2CON) CLR EXEN2 ;Ignore events on T2EX MOV TH2,#0FBH ;FB7F 1600Hz @ 11.0592 in X2 with timer2 in X2 MOV TL2,#7FH ;1600Hz @ 11.0592 in X2 with timer2 in X2 MOV RCAP2H,#0FBH ;1600Hz @ 11.0592 in X2 with timer2 in X2 MOV RCAP2L,#7FH ;1600Hz @ 11.0592 in X2 with timer2 in X2 CLR CT2 ;Timer mode (C/T2# in T2CON) CLR CPRL2 ;Reload mode (CP/RL2# in T2CON) SETB EA ;Interupt enable SETB ET2 ;Enable timer2 interrupt SETB TR2 ;Timer2 run(in T2CON) RET ;-------------------------------------------------------------------------------; ; I N I T S R L S U B R O U T I N E ; ;-------------------------------------------------------------------------------; INITSRL:MOV SCON,#50H ;Mode 1, REN=1, SM2=0 => RB8(SCON)<-stop bit ANL BDRCON,#0EEH ;BRR=0, SRC=0 ORL BDRCON,#0EH ;TBCK=1, RBCK=1 => IBG for T&R, SPD=1 (FAST) MOV BRL,#0FDH ;115200 with 11.0592 in X2 SETB ES ;Enable serial interrupt SETB EA ;Enable global interrupt ORL BDRCON,#10H ;Baud rate generator run RET ;-------------------------------------------------------------------------------; ; I N I T P C A S U B R O U T I N E ; ;-------------------------------------------------------------------------------; INITPCA:MOV CMOD,#00H ;Initializing PCA timer @ (FClkPeriph)รท6 => 7.2kHz MOV CCAPM1,#42H ;Initializing PCA module1 for PWM MOV CCAP1L,R6 ;Duty cycle held in R6 MOV CCAP1H,R6 ;Duty cycle held in R6 SETB CR ;Turn the PCA timer on RET ;-------------------------------------------------------------------------------; ; I N I T S P I S U B R O U T I N E ; ;-------------------------------------------------------------------------------; INITSPI:ORL SPCON,#10H ;Master mode without Slave Select ORL SPCON,#20H ;P1.1 is available as standard I/O pin ORL SPCON,#01H ;Fclk Periph/4=2.7648MHz(2.8935us per byte) ANL SPCON,#0F7H ;CPOL=0 => SCK=0 in idle state ANL SPCON,#0FBH ;CPHA=0 ORL SPCON,#40H ;Run SPI (SPEN set) AFTER setting MSTR, CPOL and CPHA RET ;-------------------------------------------------------------------------------; ; I N I T D O G S U B R O U T I N E ; ;-------------------------------------------------------------------------------; INITDOG:ORL WDTPRG,#00H ;(2^14-1) machine cycles, 8.88ms @ 11.0592MHz in X2 RET ;-------------------------------------------------------------------------------; ; E X C E P T I O N H A N D L E R ; ;-------------------------------------------------------------------------------; ; ORG 0FFFFH - 0002H ;Length of Handler routine XHNDLR: JMP XHNDLR ;Unused memory locations filled with NOPs(00H). If 1) unexpected interrupt (due to glitch/crash) or 2) crazy PC (due to noise) happened, reset uC by preventing main from feeding/kicking the dog. ;-------------------------------------------------------------------------------; ; E N D ; ;-------------------------------------------------------------------------------; END |
