Hi, Mohit,

I am assuming you have ment a uCU/uPU system data and address buses
testing.
So, the address bus can be tested by running a dummy programm. For
one core it can be code ROM erased (by 00h), and for another you
should fill in the ROM with "nop" instruction opcode. So, you will
get sequentally increasing address while the system running.
For data bus test some special paterns like 55h and 0AAh can be
used.

Regards,
Oleg