| ??? 09/18/06 05:59 Read: times |
#124436 - not so good enough Responding to: ???'s previous message |
hi,
Grant Beattie said:
"When reading, the logic levels of the Port's input pins are returned regardless of theXBRn settings (i.e., even when the pin is assigned to another signal by the Crossbar, the Port register can always read its corresponding Port I/O pin)."
Sure, but in real practice this way cannot be named "reading of input pin". This way is "reading of integrated peripheral output/input signal". The difference is that couple of built-in peripheral use strong "0" or "1" levels as output. For example, SPI mode 0 defines low level ("0") as passive state for SCK signal. Now reading from this pin returns 0 even you try to pass weak level "1" to it from external hardware. Of course such combinations may cause short circuit and burn off hardware so very dangerous. Regards, Oleg |
| Topic | Author | Date |
| Input config for p2.6 in c8051f310 | 01/01/70 00:00 | |
| Input config for p2.6 in c8051f310 | 01/01/70 00:00 | |
| just use open drain | 01/01/70 00:00 | |
| I did use open drain | 01/01/70 00:00 | |
| what do you mean, how do you know | 01/01/70 00:00 | |
| Red herring? | 01/01/70 00:00 | |
| naah, it's 5:30 and I'm signing off | 01/01/70 00:00 | |
not so good enough | 01/01/70 00:00 | |
| Quasi-bidirectional | 01/01/70 00:00 | |
| In the data sheet, you find ... | 01/01/70 00:00 | |
| Yes, got it | 01/01/70 00:00 |