| ??? 10/12/06 05:56 Read: times |
#126265 - Parity detection Responding to: ???'s previous message |
Thanks, that makes sense. However, how about parity detection on the MCU's side? I'm not sure at which point in the UART transmission the ISR is called. According to my MCU datasheet, the UART buffer is double buffered, and the interrupt is generated when 8 bits have been transferred from buffer1 to buffer2. I don't know if this includes the parity/stop bit, i.e. in my ISR, I don't know if I can assume that the transmission is currently in the "stop bits" portion, so that I can pull the I/O line low? I don't want to be pulling the I/O line low when the sender is still sending the parity bit(too early), or when the stop bits have already passed(too late).
And regarding pulling the I/O line low for 1 etu, how do I even do that? If I enable my TX interrupt and set my UART buffer to 0 , wouldn't that send 8 bits of 0 complete with start/stop bits? How can I specifically pull it low for just 1 UART cycle? |
| Topic | Author | Date |
| Emulating ISO7816 smart card interface with generi | 01/01/70 00:00 | |
| See here | 01/01/70 00:00 | |
| Interesting read | 01/01/70 00:00 | |
| Can;t find the article | 01/01/70 00:00 | |
| Here it is | 01/01/70 00:00 | |
| ISO7816 transmission speed | 01/01/70 00:00 | |
| ISO7816 transmission speed | 01/01/70 00:00 | |
| Lets not get confused! | 01/01/70 00:00 | |
| A little confused | 01/01/70 00:00 | |
| 2 stop bits? | 01/01/70 00:00 | |
| Read up on async communications | 01/01/70 00:00 | |
| Parity detection | 01/01/70 00:00 | |
| use UART mode 3 - that's 9 bits! | 01/01/70 00:00 | |
| Same question on AVRfreaks? | 01/01/70 00:00 | |
| GSM Only? | 01/01/70 00:00 | |
| not exactly GSM only.... | 01/01/70 00:00 | |
All types | 01/01/70 00:00 |