I have written this code for my mcp42010 digipot. The pot requires spi interface. I modified an i2c code to output sda, scl and cs. I have run my code in a sim. and it looks to be functioning as coded but I an not get the pot to activate. All of the timings with the com require a min 40ns timing. I think I have well exceeded the time min. requirement. there is no max accept for a 10mhz clock speed. I am sure my clock speed is well under 10mhz. I think my prolem is with timing or the order I send commands. here is my code, thanks for any help.

bob
I am not sure how to post a doc file. here is my code.


;software serial comm to digipot
;at89c4051 @ 11.059mhz


;Variable Declairation

sda equ p1.1 ;tx pin
scl equ p1.0 ;clk pn
cs equ p1.2 ;chip select
potab equ 0dbh ;enable pot 0 & 1
pota equ 0d9h ;enable pot 0
potb equ 0dah ;enable pot 1
cold equ 00dh ;pot cold setting

org 0

Initialize:

mov r0,#0ffh ; set regesters with 1-3 with timing and loop settings
mov r1,#04ch
mov r3,#00fh
mov r5,#cold ;pot 0 reg
mov r6,#cold ;pot1 reg
mov r7,#014h ;increment pot loop
setb cs ;initialize output pins
setb sda
setb scl
acall etc_iat ;start

Data_ECT:

; acall delay2
acall ECT ;send ect and iat settings to pot with delays
Data_IAT:
; acall delay2
acall IAT
acall ECT


Mainline:

inc r5 ;increment pot settings prior to writing to pot
inc r6
djnz r7,data_ect ;inc. counter & write to pot after inc.
ajmp loop

ECT:
; write ect to pot
mov a,r5
clr cs
acall txsend
mov a,#pota
acall txsend
; acall delay
setb cs
ret

IAT: ;write iat to pot

mov a,r6
clr cs
acall txsend
mov a,#potb
acall txsend
; acall delay
setb cs
ret

ETC_IAT: ;write ect & iat to pot

mov a,r5
clr cs
acall txsend
mov a,#potab
acall txsend
; acall delay
setb cs
ajmp mainline



txsend: ;output data to pot via software spi
mov r4,#008h
txloop:
rrc a
mov sda,c
clr scl
; acall delay
setb scl
djnz r4,txloop
ret

delay: ;delays using reg. 0-3



djnz r0,delay
ret

delay1:

djnz r0,delay1
inc r1
cjne r1,#0,delay1
cjne r2,#0,decrament
mov r2,#014h
decrament:
djnz r2,delay1
ret

delay2:

acall delay1
djnz r3,delay2
ret

loop:


acall loop

end