| ??? 06/15/07 00:11 Read: times |
#140810 - P89LPC935 I2C SCL Problem Using TR1 Overflow |
When Timer 1 overflow (Timer 1 in Mode 2) is used as the source for I2C SCL (CRSEL = 1), TH1 determines I2C SCL rate. I have found that, regardless of microcontroller clock source or speed, if TH1 is set 253, 254 or 255 then the I2C interface signals SCL and SDA are not correct (extra SCL pulses and incorrect SDA levels). If TH1 is set to 252 or below, the I2C interface works correctly. Unfortunately, I need TH1 to be 254 to get the I2C bus speed that I need.
Any comments anyone? |
| Topic | Author | Date |
| P89LPC935 I2C SCL Problem Using TR1 Overflow | 01/01/70 00:00 | |
| Check the erattaon the NXP web site | 01/01/70 00:00 | |
| No problem indicated in the NXP Errata Sheet | 01/01/70 00:00 | |
| Check your code | 01/01/70 00:00 | |
The code is working except if TH1 >252 | 01/01/70 00:00 |