| ??? 06/18/07 16:11 Read: times |
#140960 - The code is working except if TH1 >252 Responding to: ???'s previous message |
Joe, Thanks again for replying.
The code works sending and receiving using the I2C bus; there seems to be a timer 1 problem. The only problem is: when timer 1 overflow is used as the I2C clock source (CRSEL = 1), if TH1 (the 8-bit reload value) is set to 253, 254, or 255 the I2C data and clock (SDA and SCL) become scrambled; if, however, TH1 is set to any value up to and including 252 the I2c interface is completely functional. Since the problem only occurs with TH1 the 3 highest values I'm wondering if it is a design error in the LPC900 series and if there is a workaround for this. |
| Topic | Author | Date |
| P89LPC935 I2C SCL Problem Using TR1 Overflow | 01/01/70 00:00 | |
| Check the erattaon the NXP web site | 01/01/70 00:00 | |
| No problem indicated in the NXP Errata Sheet | 01/01/70 00:00 | |
| Check your code | 01/01/70 00:00 | |
The code is working except if TH1 >252 | 01/01/70 00:00 |