| ??? 07/05/07 22:35 Read: times |
#141529 - Inidistinguishable Responding to: ???'s previous message |
A stop bit is the same state as the line idle state - so it's not possible for the receiver to distinguish between 2 stop bits, and one stop bit followed by one bit-time of idle!
See: http://www.8052.com/forum/read.phtml?id=138741 So, as Jan says, you have absolutely nothing whatsoever to do to receiev two stop bits, and sending would be just a matter of adding an inter-character delay... |
| Topic | Author | Date |
| 2 Stop Bits on AT89C55WD | 01/01/70 00:00 | |
| RECEIVE???? | 01/01/70 00:00 | |
| Protocol | 01/01/70 00:00 | |
| I know nothing on DCF77... | 01/01/70 00:00 | |
| OK | 01/01/70 00:00 | |
| Inidistinguishable | 01/01/70 00:00 | |
hairsplitting | 01/01/70 00:00 |