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???
07/06/07 07:02
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#141536 - hairsplitting
Responding to: ???'s previous message
Andy Neil said:
A stop bit is the same state as the line idle state - so it's not possible for the receiver to distinguish between 2 stop bits, and one stop bit followed by one bit-time of idle!

While this is absolutely true, the receiver could possibly check whether there is at least the two bit's idle after the last data (or parity) bit. (More precisely, it should check for one-and-a-half, but that's an another issue).

Not that it would change anything. There is no reason for the receiver to do so, and none of them does so.

JW


List of 7 messages in thread
TopicAuthorDate
2 Stop Bits on AT89C55WD            01/01/70 00:00      
   RECEIVE????            01/01/70 00:00      
      Protocol            01/01/70 00:00      
         I know nothing on DCF77...            01/01/70 00:00      
            OK            01/01/70 00:00      
   Inidistinguishable            01/01/70 00:00      
      hairsplitting            01/01/70 00:00      

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