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???
12/17/07 14:01
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 		 #148380 - if you read the OP
Responding to: ???'s previous message
True, but with usual bit rates (let's use 115200 bps), even a 16 MHz 12-clocker has about 115 cycles before that happens. If your other ISR blocks the CPU for 115 cycles, it might just be too long
If you read the OP, you easily get the impression that 115 Icycles will be longgone before the serial ISR get enabled.

I do, of course, agree that the serial ISR often is a candidate for 'occasional disable' however, IMHO ANY disabling of ANY interrupt (for more than e.g. a few cycles to handle atomicity) should be avoided like the plague.

Erik

List of 34 messages in thread
TopicAuthorDate
Having problem on using interrupt            01/01/70 00:00      
   Answers            01/01/70 00:00      
      not so fast, Cristoph and to Ragu            01/01/70 00:00      
         Serial comm is slow.            01/01/70 00:00      
            if you read the OP            01/01/70 00:00      
               good interupts            01/01/70 00:00      
                  AAAAAARGH            01/01/70 00:00      
                     not AAAAAAAARGH            01/01/70 00:00      
                        OH YES            01/01/70 00:00      
                           do You ever avoid "non-debuggable"?            01/01/70 00:00      
                              always            01/01/70 00:00      
                                 nice            01/01/70 00:00      
                                    a trick for "long ISRs" better than a RTOS            01/01/70 00:00      
         Buffered RX            01/01/70 00:00      
            not much difference            01/01/70 00:00      
               You are right            01/01/70 00:00      
   Sucess with interrupts            01/01/70 00:00      
      Isn't it too short?            01/01/70 00:00      
         the reason for circular buffers            01/01/70 00:00      
            Worst case, instead of average            01/01/70 00:00      
               absolutely, just worst case is not as bad            01/01/70 00:00      
                  single, double and ring buffer            01/01/70 00:00      
                     single, double and ring buffer app dependent            01/01/70 00:00      
         and some more reasons to use (circular) buffers            01/01/70 00:00      
            buffer overflow error            01/01/70 00:00      
               Buffer overflow handling            01/01/70 00:00      
                  Buffering options            01/01/70 00:00      
                     Beauty contest !            01/01/70 00:00      
                        flexible is the best?            01/01/70 00:00      
                        Simplicity is always better            01/01/70 00:00      
                           simple is another word for            01/01/70 00:00      
                              Where is the borderline to stumble on            01/01/70 00:00      
                                 Copper Oxide            01/01/70 00:00      
               please exclude me from the 'we'            01/01/70 00:00      

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