??? 05/29/08 00:55 Modified: 05/29/08 00:56 Read: times |
#155240 - Settling time? Responding to: ???'s previous message |
I guess this OPamp is not fast enough, it provides a settling time of 8µsec.
Remember that during the track and hold period the ADC input usually presents a dynamic load, where the OPamp must be able to maintain the signal. Kai |
Topic | Author | Date |
ADC of Silabs MCU | 01/01/70 00:00 | |
At best the SiLabs A/D.... | 01/01/70 00:00 | |
A Simple Attenuator | 01/01/70 00:00 | |
Tweaking... | 01/01/70 00:00 | |
Further tweaking.. | 01/01/70 00:00 | |
yes | 01/01/70 00:00 | |
I had that coming.. | 01/01/70 00:00 | |
Drop the Trim | 01/01/70 00:00 | |
100% practical with theory | 01/01/70 00:00 | |
For your A/D Subsystem.... | 01/01/70 00:00 | |
buffer op-amp | 01/01/70 00:00 | |
Chosen Op-Amp : CA5420A | 01/01/70 00:00 | |
Settling time? | 01/01/70 00:00 | |
My signal is a slowly varying one | 01/01/70 00:00 | |
settling time![]() | 01/01/70 00:00 | |
internal reference specified from 2.36 to 2.48 V! | 01/01/70 00:00 | |
do not calibrate if you can avoid it | 01/01/70 00:00 |