Thanks to all for sharing your knwoledge, very useful for current and future designs.

On a current design, a M2M system, we use a Maxim DS80C400 (based on 8051) with TINI system, external RAM(1Mb) and ROM(1Mb), no latch, and two SPI memories (recently added). Bootloader/slush copy the neccesary code from ROM to RAM at the start, executes in RAM and then Java takes the control. All this has its advantages (software development) but also its disadvantages (only the virtual machine plus the main application uses RAM enough).

We use java because it did help us much with the GSM/GPRS modem when we started the project.
Sometimes the system runs out of RAM. That's why we are interested in using the SPI memories as, at least, a support of the main parallel RAM.

So, if I understand well we have two options:

A) to use the SPI as usual, I mean: storing and reading arrays of memory when needed, just manually, and try to free the main RAM from not critical data when possible. (Maxim ofers some java libraries to manage an SPI SD card and storing/reading files that we would need to adapt to be used with our SPI memories)

B) to modify OS or firmware in some way to get something similar to what Erik said about Keil compiler does. I guess this must not be too easy to do. Also the system would be very slow, I agree, but maybe only when accesing SPI memory (using main RAM as much as possible), and considering those accesses really neccesary due to RAM space exceeded then it could be good solution for some applications. I wonder if the solution of using a FPGA proposed by Michael could be emulated by a OS, firmware or a compiler. Maybe yes, although this would need the main RAM to emulate the cache, accessing routines, etc.

Am I right? Or are there more options yet?

Option A will be used for sure, the challenge for us would be using option B too..... does anyone have any info/idea that could help in that way?

Thanks & regards,

Guille