led1 equ P1.4
led2 equ P1.6

rseg mybitsegment
inputP32state: ds 1
inputP33state: ds 1


rseg mycodesegment
ISR_EX0:
  clr inputP32state  
  clr led1
  clr TR0
  mov TL0,#0ffh
  mov TH0,#0ffh
  setb TR0       
  reti
ISR_TIMER0:
  setb inputP32state 
  setb led1
  clr TR0
  reti
ISR_EX1:
  clr inputP33state 
  clr led2
  clr TR1
  mov TL1,#0ffh
  mov TH1,#0ffh
  setb TR1 
  reti
ISR_TIMER1:
  setb inputP33state 
  setb led2
  clr TR1
  reti

main:
 ;setup
  clr EA
  setb IT0 ;falling edge sensitive external interrupts
  setb IT1
  setb EX0
  setb EX1
  mov TMOD,#099h ;GATE on,Timer mode, mode 1 for both timers
  clr TF0
  clr TR0
  clr TF1
  clr TR1
  clr IE0
  clr IE1
  setb EA

main_loop:
  
  jmp mainoop
  

Problems:
1) both timers are used, obviously You need one additional timer for system timer (for example for good key_scan() procedure) and maybe one timer for serial channel.
2) To detect rising edge trough timers high state of input signal must be at least one mashine cycle long . But since timer is enabled inside ISR_EXx high state must be assumed no shorter than 5-6 mashine cycles if only one input is hanled. so let assume 50..100 mashine cycles is shortest allowable period of input signal. With 12MHz quartz and standard 8051 this means 50..100 microseconds - 20kHz...10kHz.

If Your input signal is 50 kHz or micro must handle some hard additional tasks - all these efforts will have no results.


So back to question: how fast are sygnals in Your system?
If P3.3 and P3.2 are in range 1...200 Hz You can handle
state inside periodical (1000Hz) timer interrupt.

And Bigger question is - why You need these states, for what purpose. What decision You must take , based on state of these inputs. You must understand clearly - answers are so good as questions. If You make good question - You will get good answers. On bad questions You will get bad answers.
If You describe Your system in details , You will get useful advises and answers.
And this is more important,than particular task.
regards