kishore,

I don't know of any fault tollerant schematics for 8051's. There is quite a bit of information for the Linux OS that you may be able to glean information from for your project. Here is a white paper from Kimberlite. It has some block diagrams that may help you understand the theory.

 http://www.missioncriticallinux.com/products/kimberlite_white_paper.pdf

Another word to do a search for is "FAILOVER".

<>< Lance.


Following is Kishore's email that was privately sent to me...so others know more of the need...
----------------
sir,
Thanks for your quick reply.
i have been going through quite of lot of site about fault tolerance
design,hardly any one gives conception of design in terms of actual
implementation of the system.
i have to design a data acquisition system which would roughly handle
about 100 digital and a dozen analog signals.Now i require to use SBC's
for the aquisition with fault tolerant capability.That is to say 2 SBC'c
will be simultaneoulsy processing the data,but at a time only one of them
will be synchronized with the field.so this may require some swithching
logic to decide healthiness of each SBC and to route the resultant signals
to the field.
Now i would like know the actual practical implementation of the scheme if
any? a documemtation with schematics of any existing systems implemented
with this scheme.It will quite useful if you can atleast send me the block
schematic of the scheme for both h/w and s/w(what rtos to be used etc..)

with regards
kishore
india