| ??? 08/12/11 11:45 Modified: 08/12/11 12:18 Read: times  | 
#183326 - Less logic? Responding to: ???'s previous message  | 
Hi Michael,
 Yes, it looks as though you would be a good person to ask about this one, and I appreciate your having gone to considerable lengths to help here. Hmm...I'm wondering if it wouldn't be possible to simplify the circuit, and to get away with just a single inverter gate?:  
Unfortunately, I think this produces a +10V spike on the circuit output whenever the inverter's output returns to the high level. Maybe this is a problem for my microcontroller's interrupt input, so I wonder whether I should be concerned about clamping the signal with a 5.1V zenner diode? Better still, how about we omit the power hungry inverter, and replace it with an n-channel mosfet. I think this eliminates the +10V spike at the circuit output, as the ground terminal of the timing capacitor is never driven to the +5V level. From my modest understanding, it appears that this may get me down to within the single uA overall power consumption realm in the inactive state(?).  
Am I making much sense here? I like the MOSFET idea as I can get one tomorrow. Getting hold of a 1G inverter gate might take a little more doing. Regards, M.  | 
| Topic | Author | Date | 
| Generating Interrupt Signal. | 01/01/70 00:00 | |
| Power for inverter | 01/01/70 00:00 | |
| 74HC1G14GW | 01/01/70 00:00 | |
| Yep, that will do the job. | 01/01/70 00:00 | |
| Catching the L--->TS Condition | 01/01/70 00:00 | |
| Less logic? | 01/01/70 00:00 | |
| Talking About Circuits | 01/01/70 00:00 | |
| Thanks | 01/01/70 00:00 | |
| Open inputs | 01/01/70 00:00 | |
                  Will do.        | 01/01/70 00:00 | 



