Hi Kevin,

at first you should read again the 8051 data book about the 4 exteral memory control signals:

- ALE was only feed into the 74HC373 address latch, nothing more.

- /PSEN was the output enable of external programm memory

- /RD was the output enable of external data memory or memory mapped inputs

- /WR was the write enable of external Flash, EEPROM, SRAM or memory mapped outputs.
E.g. a half 74HC139 can be used to feed the /WR signal into its enable input and use the 4 outputs to write data into up to 4 74HC374 latches.


Since you want to access more than 64kB you must use some tricks to combine Flash, SRAM and I/O together. E.g. use additional port pins to select all these in portions of no more than 64kB.
The already suggested 74HC139 seem useful to do this.

If all of your memory was inside the data space, there is no problem.

But, if portions of the Flash or SRAM should be program memory, then special care must be taken, to switch the right bank prior every subroutine call, especially on interrupts. E.g a reserved memory space for interrupts ignore any attempt to change the bank. Typically a PLD (e.g PALCE22V10) was used to do this.
There are already lot of threads about "code banking" on this forum and on the Keil web (if using C).


Peter