| ??? 01/28/02 11:57 Read: times |
#19150 - RE: port 0 and external memory use |
Again, READ THE DAMNED DATA SHEET !
On using external memory P0, P2 no longer available. But I/O ports can be build as memory mapped I/O (with latches, tristate drivers). If you use two 373 latched with ALE, it make no sense, both outputs are identical. Again, memory mapped outputs should be build with /WR as latch signal and some address decoding (e.g. 74HC139). At first you should write a memory map: with address ranges are used for Flash, for SRAM and for memory mapped I/O. Peter |
| Topic | Author | Date |
| port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
| RE: port 0 and external memory use | 01/01/70 00:00 | |
RE: port 0 and external memory use | 01/01/70 00:00 |



