re: George, could you tell me more about adc timing? Thanks

Without seeing the circuit or the code, one can only guess, but, one possible answer to the problem you are seeing is that the chip select (cs) for the adc devices are being asserted simultaneously. Brief contentions might show up as junky data. It would fall in line with the problem only being present when two devices are ganged from the uc.

One possible scenario out of many, and probably not the root, but merely an example of what I mean about timing. I might poke around with a scope and check it out.