Many thanks to those who helped with the clock problem. Here's another one:

The system is supposed to perform a memory test anytime it is powered up or the reset button is depressed. So far I have not been able to get the computer to perform the test. Needless to say, nothing else works.

I am using the configuration described in "The Microcontroller Idea Book" by Jan Axelson on p24. However, pins 4 and 29 (-ALEDIS and -PSEN) respectively are left floating since pin 31 (-EA) is tied high in order to access the BASIC interpreter. Pin 30 (ALE) is tied directly to pin 11 (LE) of the 373 latch. Also pins 16 and 17 (-WRITE and -READ respectively) are tied directly to pins 27 and 22 (-WE and -OE) of the 62256 RAM.


Can these deviations from the recommended wiring diagram prevent the system from booting?

The RAM I'm using is a Toshiba TC5565APL-12.

Both the clock and the ALE signals are clean.

All address lines (A0-A15) show a logic high regardless of the position of the reset switch. There's no bus activity whatsoever.

Any suggestions?

Sergiu Tofanel