I wondered about this for a recent project that required interfacing a 5 volt ADC with a 3.3 volt CPLD. I asked TI about it, and they recommended using a HCT chip--lots of logic families consider a logic high as 0.7 times Vcc, so you would need 3.5 volts, but the HCT family (at least from TI) uses 2.4 volts and greater as a logic high. I followed their advice using a 74HCT125 buffer, and it worked.
-Josh