Jeff Corr wrote:
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On this particular chip, the data is clocked in, then two clocks are sent, then the data is recieved with 8 clocks. I can't be sure of the timing 100% without a scope, but I've slowed it down quite a bit, I believe it is slow enough to work well. But doesn't.


Err. A control word is clocked in. A return byte is clocked out and ignored. A null word (8 0 is clocked in), and the first word received. A second null word is clcoked out and the second word received.

This doesn't sound like what you have.

Steve