| ??? 11/27/02 02:06 Read: times |
#33257 - RE: UART's Actions on Interrupts |
I think I have confused you with my first post. Here is a more detailed description of the situation I am asking about: The interrupt I am referring to is an *external* interrupt (not TI or RI). My question is, if I am in the middle of transmitting a serial message, and INT0 triggers an interrupt, will the byte that is currently being shifted out of SBUF continue to be shifted out during the interrupt, or will it have to wait until the interrupt has completed before it finishes being transmitted? Sorry for any confusion. |
| Topic | Author | Date |
| UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART\'s Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART\'s Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: Interrupt precognition - jez | 01/01/70 00:00 | |
| RE: UART\'s Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART\\\'s Actions on Interrupts | 01/01/70 00:00 | |
| RE: overlooked fact | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: Fictitious components | 01/01/70 00:00 | |
| RE: Fictitious components | 01/01/70 00:00 | |
| RE: Fictitious components | 01/01/70 00:00 | |
| RE: Fictitious components | 01/01/70 00:00 | |
RE: Fictitious components | 01/01/70 00:00 |



