| ??? 11/27/02 13:43 Read: times |
#33288 - RE: overlooked fact |
When using the '51 to drive a 485 line, the reversal of the transciever direction pin at end of transmit must take place 1/2 bit time AFTER the interrupt since the interrupt occur in the middle of the stop bit.
Now to the question: The UART runs COMPLETELY independent of other processes except for SBUF read and write. Obviously if another interrupt occur during read and is so sloppily written that the SBUF can not be read before the next byte is there, an error will occur. In transmit, the only result will be gaps in the bit stream which, in most cases, is not a problem. Erik |
| Topic | Author | Date |
| UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART\'s Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART\'s Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: Interrupt precognition - jez | 01/01/70 00:00 | |
| RE: UART\'s Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART\\\'s Actions on Interrupts | 01/01/70 00:00 | |
| RE: overlooked fact | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: UART's Actions on Interrupts | 01/01/70 00:00 | |
| RE: Fictitious components | 01/01/70 00:00 | |
| RE: Fictitious components | 01/01/70 00:00 | |
| RE: Fictitious components | 01/01/70 00:00 | |
| RE: Fictitious components | 01/01/70 00:00 | |
RE: Fictitious components | 01/01/70 00:00 |



