| ??? 12/24/02 23:34 Read: times |
#34980 - RE: Temic T89C51RD2 internal EEPROM |
Walter,
While the internal EEPROM (xrom) is being programmed, the address lines to that data space aren't to be changed from that 64 byte page. This is mentioned as a short blurb in the temic documentation but they don't give details. This has ramifications depending upon how you interpret that. The documentation says that the upper 10 address lines of the expanded address space shouldn't change during programming. That technically means you shouldn't start the programming and while waiting, access internal expansion ram or external bus devices. Do they really mean that? I don't know. I am working on some code that does the xrom and xram access in background threaded taskers. When the xrom is written, its begun and then the task is released after scheduling another look at the completion flag 10ms later. According to the letter of the Temic document, I shouldn't attempt xram access during a xrom programming sequence and so should add disable xram access flag during the sequence. I've been pondering how far I can push the envelop between xrom and xram transfers. When no programming is initiated, I should be able to toggle map between the two and read from xrom all I want. I should too be able to write a xrom 64byte page from xram. But when programming begins, stay away! I'm going to write some code to test this scenario out. I've had no trouble accessing xrom, xram, external eeprom etc... but you have to be more careful when you put it into a tasker. If anyone is particularly brilliant on this aspect of T89 architecture, please speak up. |
| Topic | Author | Date |
| Temic T89C51RD2 internal EEPROM | 01/01/70 00:00 | |
| RE: Temic T89C51RD2 internal EEPROM | 01/01/70 00:00 | |
| RE: Temic T89C51RD2 internal EEPROM | 01/01/70 00:00 | |
| RE: Temic T89C51RD2 internal EEPROM | 01/01/70 00:00 | |
RE: Temic T89C51RD2 internal EEPROM | 01/01/70 00:00 |



