| ??? 01/22/03 03:35 Read: times |
#36926 - RE: \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\step verify |
Hi Rezvani
I have found your problem. You go like this... first you send entry code 1- send 0f2h ;op code for write the error counter 2-send 0fdh ;for add error counter 3- send 0feh ********************************* then i clear clock and set the i/o line finally i send 102 clock *** but i/o line goes to 0 and then ********************************** send psc verify 1-byte:0cdh 2-byte:0feh 3- byte:psc code:0ffh wait for i/o goes to high send second psc byte 1-byte:0cdh 2-adbyte:0ff 3-byte: psc code : 0ffh wait for i/o goes to high NOTE: I will do some modification in your CK: procedure and let you know, but first you send correct control bytes and test the reader. bye, Sanjeev Tyagi |



