PCB tracks can be considered conductors with a certain - albeit low - resistance.

When current flows through a track, this resistance causes a certain voltage drop (remember Ohm's law).

Now let's assume we have to digital ports of two different chips connected. The output of the first port is connected to the input of the second port. The 0V references of both devices are connected to the same potential (0V of the supply), but, due to the PCB tracking, the 0V supply of the second device has a larger impedance (resistance). The result will be that the 0V of the second device will actually have a higher potential (0V + current flowing through the track x PCB track resistance). This means that the voltage level the second device 'sees' on its input will be the same amount lower (in actual fact: it will be even lower than that because of voltage drop in the signal line itself, through which a current, too, will be flowing). The result may be that a 'high' state may wrongly be detected as 'low' and vice versa.

That's only part of the story, but it may point into the direction where on has to look for. Obviously, impedance is the thing that actually counts here. In the above example, we only looked at the static impedance, but in a digital circuit we also have to take into account the dynamics. Additionally, we also have to deal with capacities and inductions, which also are responsible for the impedance. At high frequencies, even small capacties and inductions are of great influence.

And now for the loops. Consider a circuit with a lot of components, all connected to the same reference (0V) at one end. Each component draws a small static current from the supply. The layout of the 0V reference is made in the form of a loop, so from the supply 0V it runs to the first component, from there to the second, etc, and finally to the last where it is again reconnected to the 0V of the supply. A nice loop. Now back to the impedance: what's so wrong with this layout? The total impedance is lower than would be the case when the last connection - back to the supply - wouldn't be there. So why is this loop so bad?

The answer is not in the static behaviour, where the current running trough the tracks is nicely devided into 2 rungs when observed from the supply source's point of view.

Problems will occur when the circuit goes dynamic, where each component starts drawing more or less current and I(0V) will change for each part. The current through the loop will change correspondingly and at some point even may change direction (changeover from one side of the loop to the other). This is where things start to go wrong alltogether: remember what happens when the current in a transformer winding changes direction? The initial reduction of impedance now turns against you.

So the solution is quite simple:

1. Prevent loops at all cost.
2. Consider static and dynamic power consumption of your components when laying out power tracks. You can create several rungs, e.g. for logic and for power stages, but make sure that they are only interconnected at the 0V input of your PCB.
3. Use wide tracks to reduce track resistance. If you have the possibility, use a separate plane (multi-layer board) for your supply and return.

Well, there IS more to it than just this, especially when you move towards really high frequencies. I think there's a lot of information to be found on the internet when it comes to this, so go and have a look, I would say.

Menno