Thanks for the reply Peter, however, the problem I have is that the paging was done in hardware on my boards. With the exception of setting one or two bits, P1_3 and P1_4, the rest of the paging (2 megabytes worth) was done exteranally with a pair of 16V8 pals and a D flip-flop.
I am hoping to find a white paper or any literature that might discuss different paging strategies so I can piece together how this was supposed to be accomplished.