Remember the input half of DTL? A simple AND gate is constructed in a way that allows ANY logic 0 through to the output. In this case 8 diodes are connected together at the ANODES along with a resistor to Vcc. All the inputs are connected to the cathodes so that if any input goes to 0 its diode becomes forward biased and pulls the gate's output to ground. If the 0.6 volt drop is a problem, use germanium diodes with its smaller drop.

Hal