Here is a schematic for showing how to connect eight 6264 type 8Kx8 RAM chips
to the external RAM bus of an 89C52. Here is a Download Link for the
schematic picture.



If you use this idea to connect up less than 8 total chips it is a good idea to use the outputs Y0 -> Y1 -> Y2 -> Y3 -> Y4 -> Y5 -> Y6 -> Y7 of the 74HC138 on sequence.

If you implement this note that it may be next to impossible to procure 6264 type RAM chips anymore. More readily available 62256 type chips each provide 32K x 8 of RAM and so if you used those with this scheme there would be two more address lines on each RAM chip (namely A13 and A14 lines). You could connect these to two output bits of PORT1 to implement four 64K byte banks of external data memory. The banks would be selectable by writing the correct 2 bit pattern to those port bits.

Note - Thanks to:
www.prjc.com
PJRC.COM, LLC.
14723 SE Brooke CT
Sherwood, OR 97140 USA

...for letting me "borrow" a graphic of an 8052 schematic that I could mess with to make this example.

Michael Karas